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authorerifan01 <eric.fang@arm.com>2020-08-12 17:41:54 +0800
committerEric Fang <eric.fang@arm.com>2022-04-01 07:18:42 +0000
commit62d4c32b7e5c1f5954c97c264d1105fc3743220e (patch)
treed7942ff8b6d1938d9a664331502a51acc613d030 /src/cmd/asm/internal/asm/testdata/arm64error.s
parent26ab2159694b19ef5feb56f4fe7a9cd18360dcdd (diff)
downloadgo-62d4c32b7e5c1f5954c97c264d1105fc3743220e.tar.gz
go-62d4c32b7e5c1f5954c97c264d1105fc3743220e.zip
cmd/asm: add DC instruction on arm64
There was only a placeholder for DC instruction in the previous code. gVisor needs this instruction. This CL completes its support. This patch is a copy of CL 250858, contributed by Junchen Li(junchen.li@arm.com). Co-authored-by: Junchen Li(junchen.li@arm.com) CustomizedGitHooks: yes Change-Id: I76098048a227fbd08aa42c4173b028f0ab4f66e8 Reviewed-on: https://go-review.googlesource.com/c/go/+/302851 Reviewed-by: Cherry Mui <cherryyz@google.com> Trust: Eric Fang <eric.fang@arm.com> Run-TryBot: Eric Fang <eric.fang@arm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
-rw-r--r--src/cmd/asm/internal/asm/testdata/arm64error.s5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s
index a41f180bb6..52f01e16a6 100644
--- a/src/cmd/asm/internal/asm/testdata/arm64error.s
+++ b/src/cmd/asm/internal/asm/testdata/arm64error.s
@@ -437,4 +437,9 @@ TEXT errors(SB),$0
TLBI ALLE3OS, ZR // ERROR "extraneous register at operand 2"
TLBI VAE1IS // ERROR "missing register at operand 2"
TLBI RVALE3 // ERROR "missing register at operand 2"
+ DC PLDL1KEEP // ERROR "illegal argument"
+ DC VMALLE1IS // ERROR "illegal argument"
+ DC VAE1IS // ERROR "illegal argument"
+ DC VAE1IS, R0 // ERROR "illegal argument"
+ DC IVAC // ERROR "missing register at operand 2"
RET