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| author | Michael Munday <munday@ca.ibm.com> | 2016-09-12 13:33:00 -0400 |
|---|---|---|
| committer | Michael Munday <munday@ca.ibm.com> | 2016-09-12 18:06:01 +0000 |
| commit | f1515a01fd5d77b964194d3830d36ae006823ea3 (patch) | |
| tree | 227d76c14f9e173dbfb1d6e8d1e6bda4302b3eee /src/runtime/memclr_s390x.s | |
| parent | 43bdfa9337c136f4e19122914c082f34045d9509 (diff) | |
| download | go-f1515a01fd5d77b964194d3830d36ae006823ea3.tar.gz go-f1515a01fd5d77b964194d3830d36ae006823ea3.zip | |
runtime, math/big: allow R0 on s390x to contain values other than 0
The new SSA backend for s390x can use R0 as a general purpose register.
This change modifies assembly code to either avoid using R0 entirely
or explicitly set R0 to 0.
R0 can still be safely used as 0 in address calculations.
Change-Id: I3efa723e9ef322a91a408bd8c31768d7858526c8
Reviewed-on: https://go-review.googlesource.com/28976
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
Diffstat (limited to 'src/runtime/memclr_s390x.s')
| -rw-r--r-- | src/runtime/memclr_s390x.s | 70 |
1 files changed, 35 insertions, 35 deletions
diff --git a/src/runtime/memclr_s390x.s b/src/runtime/memclr_s390x.s index 86eafec0a9..846131e9f5 100644 --- a/src/runtime/memclr_s390x.s +++ b/src/runtime/memclr_s390x.s @@ -16,8 +16,8 @@ start: CMPBLE R5, $15, clear12to15 CMP R5, $32 BGE clearmt32 - MOVD R0, 0(R4) - MOVD R0, 8(R4) + MOVD $0, 0(R4) + MOVD $0, 8(R4) ADD $16, R4 SUB $16, R5 BR start @@ -25,79 +25,79 @@ start: clear0to3: CMPBEQ R5, $0, done CMPBNE R5, $1, clear2 - MOVB R0, 0(R4) + MOVB $0, 0(R4) RET clear2: CMPBNE R5, $2, clear3 - MOVH R0, 0(R4) + MOVH $0, 0(R4) RET clear3: - MOVH R0, 0(R4) - MOVB R0, 2(R4) + MOVH $0, 0(R4) + MOVB $0, 2(R4) RET clear4to7: CMPBNE R5, $4, clear5 - MOVW R0, 0(R4) + MOVW $0, 0(R4) RET clear5: CMPBNE R5, $5, clear6 - MOVW R0, 0(R4) - MOVB R0, 4(R4) + MOVW $0, 0(R4) + MOVB $0, 4(R4) RET clear6: CMPBNE R5, $6, clear7 - MOVW R0, 0(R4) - MOVH R0, 4(R4) + MOVW $0, 0(R4) + MOVH $0, 4(R4) RET clear7: - MOVW R0, 0(R4) - MOVH R0, 4(R4) - MOVB R0, 6(R4) + MOVW $0, 0(R4) + MOVH $0, 4(R4) + MOVB $0, 6(R4) RET clear8to11: CMPBNE R5, $8, clear9 - MOVD R0, 0(R4) + MOVD $0, 0(R4) RET clear9: CMPBNE R5, $9, clear10 - MOVD R0, 0(R4) - MOVB R0, 8(R4) + MOVD $0, 0(R4) + MOVB $0, 8(R4) RET clear10: CMPBNE R5, $10, clear11 - MOVD R0, 0(R4) - MOVH R0, 8(R4) + MOVD $0, 0(R4) + MOVH $0, 8(R4) RET clear11: - MOVD R0, 0(R4) - MOVH R0, 8(R4) - MOVB R0, 10(R4) + MOVD $0, 0(R4) + MOVH $0, 8(R4) + MOVB $0, 10(R4) RET clear12to15: CMPBNE R5, $12, clear13 - MOVD R0, 0(R4) - MOVW R0, 8(R4) + MOVD $0, 0(R4) + MOVW $0, 8(R4) RET clear13: CMPBNE R5, $13, clear14 - MOVD R0, 0(R4) - MOVW R0, 8(R4) - MOVB R0, 12(R4) + MOVD $0, 0(R4) + MOVW $0, 8(R4) + MOVB $0, 12(R4) RET clear14: CMPBNE R5, $14, clear15 - MOVD R0, 0(R4) - MOVW R0, 8(R4) - MOVH R0, 12(R4) + MOVD $0, 0(R4) + MOVW $0, 8(R4) + MOVH $0, 12(R4) RET clear15: - MOVD R0, 0(R4) - MOVW R0, 8(R4) - MOVH R0, 12(R4) - MOVB R0, 14(R4) + MOVD $0, 0(R4) + MOVW $0, 8(R4) + MOVH $0, 12(R4) + MOVB $0, 14(R4) RET clearmt32: @@ -117,6 +117,6 @@ done: // DO NOT CALL - target for exrl (execute relative long) instruction. TEXT runtime·memclr_s390x_exrl_xc(SB),NOSPLIT|NOFRAME,$0-0 XC $1, 0(R4), 0(R4) - MOVD R0, 0(R0) + MOVD $0, 0(R0) RET |