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| author | hasheddan <georgedanielmangum@gmail.com> | 2021-11-11 10:02:13 -0500 |
|---|---|---|
| committer | Ian Lance Taylor <iant@golang.org> | 2021-11-11 19:41:06 +0000 |
| commit | f1935c52703e4482c5047b4b35276e965896df7c (patch) | |
| tree | 0f487f4c688151246a7102ff88fc9ee28eb073a2 /src/cmd/internal | |
| parent | 8ce1a953fb125ab390e816540d7f6c304ee7e52b (diff) | |
| download | go-f1935c52703e4482c5047b4b35276e965896df7c.tar.gz go-f1935c52703e4482c5047b4b35276e965896df7c.zip | |
obj/riscv: fix link to risc-v dwarf register numbers
The repository name and structure in the RISC-V GitHub org has been
modified, rendering the existing link invalid. This updates to point at
the new location of the RISC-V DWARF specification.
Change occured in https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/208
Change-Id: I8ca4c390bee2d7ce20418cdd00e4945a426cf5f7
Reviewed-on: https://go-review.googlesource.com/c/go/+/363355
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
Trust: Brad Fitzpatrick <bradfitz@golang.org>
Trust: Than McIntosh <thanm@google.com>
Diffstat (limited to 'src/cmd/internal')
| -rw-r--r-- | src/cmd/internal/obj/riscv/cpu.go | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cmd/internal/obj/riscv/cpu.go b/src/cmd/internal/obj/riscv/cpu.go index ed88f621d9..d9434e7415 100644 --- a/src/cmd/internal/obj/riscv/cpu.go +++ b/src/cmd/internal/obj/riscv/cpu.go @@ -183,7 +183,7 @@ const ( REGG = REG_G ) -// https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#dwarf-register-numbers +// https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc#dwarf-register-numbers var RISCV64DWARFRegisters = map[int16]int16{ // Integer Registers. REG_X0: 0, |