diff options
| author | fanzha02 <fannie.zhang@arm.com> | 2021-03-17 14:52:27 +0800 |
|---|---|---|
| committer | fannie zhang <Fannie.Zhang@arm.com> | 2021-10-26 01:07:41 +0000 |
| commit | 41f74079a982dae05da1860a5f195ac08d067bdd (patch) | |
| tree | c0519015ab40146a2ce30ebf2f593e0e4cc8421d /src/cmd/internal | |
| parent | 0ec1b62ee28c633265036664c21a5cb22086f231 (diff) | |
| download | go-41f74079a982dae05da1860a5f195ac08d067bdd.tar.gz go-41f74079a982dae05da1860a5f195ac08d067bdd.zip | |
cmd/internal/obj/arm64: add a restriction on move constant instructions
For MOVK/MOVN/MOVZ instructions, the assembler does not accept zero
shifts, and the CL 275812 added the error check. This CL adds this
restriction to the document.
Change-Id: I8818d76ca2f11dade2307f3678ca521f4e64d164
Reviewed-on: https://go-review.googlesource.com/c/go/+/312210
Trust: fannie zhang <Fannie.Zhang@arm.com>
Run-TryBot: fannie zhang <Fannie.Zhang@arm.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Diffstat (limited to 'src/cmd/internal')
| -rw-r--r-- | src/cmd/internal/obj/arm64/doc.go | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/cmd/internal/obj/arm64/doc.go b/src/cmd/internal/obj/arm64/doc.go index efd4577f56..14f0f4c616 100644 --- a/src/cmd/internal/obj/arm64/doc.go +++ b/src/cmd/internal/obj/arm64/doc.go @@ -96,6 +96,19 @@ And for a 128-bit interger, it take two 64-bit operands, for the high and low pa VMOVD $0x1122334455667788, V1 VMOVQ $0x1122334455667788, $8877665544332211, V2 // V2=0x11223344556677888877665544332211 +8. Move an optionally-shifted 16-bit immediate value to a register. + +The instructions are MOVK(W), MOVZ(W) and MOVN(W), the assembly syntax is "op $(uimm16<<shift), <Rd>". The <uimm16> +is the 16-bit unsigned immediate, in the range 0 to 65535; For the 32-bit variant, the <shift> is 0 or 16, for the +64-bit variant, the <shift> is 0, 16, 32 or 48. + +The current Go assembler does not accept zero shifts, such as "op $0, Rd" and "op $(0<<(16|32|48)), Rd" instructions. + + Examples: + MOVK $(10<<32), R20 <=> movk x20, #10, lsl #32 + MOVZW $(20<<16), R8 <=> movz w8, #20, lsl #16 + MOVK $(0<<16), R10 will be reported as an error by the assembler. + Special Cases. (1) umov is written as VMOV. |