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| author | fanzha02 <fannie.zhang@arm.com> | 2018-01-26 08:15:49 +0000 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2018-04-11 14:53:02 +0000 |
| commit | 604028568e1a8c2c750ca4731c0c695516ffee65 (patch) | |
| tree | 143675747544b2850d56788b70b2119965076ad5 /src/cmd/internal/obj/arm64/doc.go | |
| parent | e0ac5f540bf0d5fff39ce05d60e82d97a011e935 (diff) | |
| download | go-604028568e1a8c2c750ca4731c0c695516ffee65.tar.gz go-604028568e1a8c2c750ca4731c0c695516ffee65.zip | |
cmd/internal/obj/arm64: add support for a series of load/store with register offset instrucitons
The patch adds support for arm64 instructions LDRB, LDRH, LDRSB,
LDRSH, LDRSW, STR, STRB and STRH with register offset.
Test cases are also added.
Change-Id: I8d17fddd2963c0bc366e12b00bac49b93f3f0957
Reviewed-on: https://go-review.googlesource.com/91575
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/internal/obj/arm64/doc.go')
| -rw-r--r-- | src/cmd/internal/obj/arm64/doc.go | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/cmd/internal/obj/arm64/doc.go b/src/cmd/internal/obj/arm64/doc.go index 4e7cb0177e..0a7700f8ac 100644 --- a/src/cmd/internal/obj/arm64/doc.go +++ b/src/cmd/internal/obj/arm64/doc.go @@ -35,10 +35,17 @@ Go Assembly for ARM64 Reference Manual LDXPW (<Rn>), (<Rt1>, <Rt2>) Loads two 32-bit words from memory, and writes them to Rt1 and Rt2. - MOVD|MOVW: Load Register (register offset) + MOVD|MOVW|MOVH|MOVHU|MOVB|MOVBU: Load Register (register offset) MOVD (Rn)(Rm.UXTW<<3), Rt MOVD (Rn)(Rm.SXTX), Rt + MOVD (Rn)(Rm<<3), Rt MOVD (Rn)(Rm), Rt + MOVB|MOVBU (Rn)(Rm.UXTW), Rt + + MOVD|MOVW|MOVH|MOVB: Stote Register (register offset) + MOVD Rt, (Rn)(Rm.UXTW<<3) + MOVD Rt, (Rn)(Rm.SXTX) + MOVD Rt, (Rn)(Rm) PRFM: Prefetch Memory (immediate) PRFM imm(Rn), <prfop> |