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| author | Ruinan <Ruinan.Sun@arm.com> | 2023-05-04 12:31:36 +0800 |
|---|---|---|
| committer | Eric Fang <eric.fang@arm.com> | 2023-05-22 01:21:54 +0000 |
| commit | d75cc4b9c6e2acb4d0ed3d90c9a8b38094af281b (patch) | |
| tree | 85157444462448b57fa065ac8bacf3a6f7686a7f /src/cmd/asm/internal/asm/testdata/arm64error.s | |
| parent | 858c61b57ec30529d3b935ddf5d83a1702d2f251 (diff) | |
| download | go-d75cc4b9c6e2acb4d0ed3d90c9a8b38094af281b.tar.gz go-d75cc4b9c6e2acb4d0ed3d90c9a8b38094af281b.zip | |
cmd/asm: encode instructions like SHA1SU0 with a separate case for arm64
Before this CL, instructions such as SHA1SU0, AESD and AESE are encoded
in case 1 together with FMOV/ADD, and some error checking is missing,
for example:
SHA1SU0 V1.B16, V2.B16, V3.B16 // wrong data arrangement
SHA1SU0 V1.4S, V2.S4, V3.S4 // correct
Both will be accepted by the assembler, but the first one is totally
incorrect.
This CL fixes these potential encoding issues by moving them into
separate cases, adds some error tests, and also fixes a wrong encoding
operand for ASHA1C.
Change-Id: Ic778321a567735d48bc34a1247ee005c4ed9e11f
Reviewed-on: https://go-review.googlesource.com/c/go/+/493195
Run-TryBot: Cherry Mui <cherryyz@google.com>
Reviewed-by: Heschi Kreinick <heschi@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64error.s | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s index fa5ec8e89c..354b64df02 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64error.s +++ b/src/cmd/asm/internal/asm/testdata/arm64error.s @@ -410,4 +410,15 @@ TEXT errors(SB),$0 DC VAE1IS // ERROR "illegal argument" DC VAE1IS, R0 // ERROR "illegal argument" DC IVAC // ERROR "missing register at operand 2" + AESD V1.B8, V2.B8 // ERROR "invalid arrangement" + AESE V1.D2, V2.D2 // ERROR "invalid arrangement" + AESIMC V1.S4, V2.S4 // ERROR "invalid arrangement" + SHA1SU1 V1.B16, V2.B16 // ERROR "invalid arrangement" + SHA256SU1 V1.B16, V2.B16, V3.B16 // ERROR "invalid arrangement" + SHA512SU1 V1.S4, V2.S4, V3.S4 // ERROR "invalid arrangement" + SHA256H V1.D2, V2, V3 // ERROR "invalid arrangement" + SHA512H V1.S4, V2, V3 // ERROR "invalid arrangement" + AESE V1.B16, V2.B8 // ERROR "invalid arrangement" + SHA256SU1 V1.S4, V2.B16, V3.S4 // ERROR "invalid arrangement" + SHA1H V1.B16, V2.B16 // ERROR "invalid operands" RET |