diff options
| author | fanzha02 <fannie.zhang@arm.com> | 2018-04-25 09:18:45 +0000 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2018-05-07 15:12:35 +0000 |
| commit | 9d72e8c686a6e446fbf39d5b6c9cec49f0713282 (patch) | |
| tree | 07dac3e6537e4c7be2bf62d6c6864dcaff858ff8 /src/cmd/asm/internal/asm/testdata/arm64error.s | |
| parent | 7b7a854c041fc15ca11bf760617f11dc31aaa519 (diff) | |
| download | go-9d72e8c686a6e446fbf39d5b6c9cec49f0713282.tar.gz go-9d72e8c686a6e446fbf39d5b6c9cec49f0713282.zip | |
cmd/internal/obj/arm64: fix illegal 4-operand instructions accepted arm64 bug
Current assmbler accepts MUL* related instructions with 4 operands,
such as instruction "MUL R1, R2, R3, R4", which is illegal.
The fix adds an actual field informantion to Optab, which has value
of C_NONE, C_REG, etc, so assembler can use p.From3Type for checking
in oplook.
Add test cases.
Fixes #25059
Change-Id: I0656319383c460696b392197bf5960b987f8fc97
Reviewed-on: https://go-review.googlesource.com/109295
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64error.s | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s index 7de9384932..36829686f6 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64error.s +++ b/src/cmd/asm/internal/asm/testdata/arm64error.s @@ -83,4 +83,8 @@ TEXT errors(SB),$0 VST1.P [V1.B16], (R8)(R9<<1) // ERROR "invalid extended register" VREV64 V1.H4, V2.H8 // ERROR "invalid arrangement" VREV64 V1.D1, V2.D1 // ERROR "invalid arrangement" + ADD R1, R2, R3, R4 // ERROR "illegal combination" + MADD R1, R2, R3 // ERROR "illegal combination" + CINC CS, R2, R3, R4 // ERROR "illegal combination" + CSEL LT, R1, R2 // ERROR "illegal combination" RET |