diff options
| author | eric fang <eric.fang@arm.com> | 2020-11-19 07:18:41 +0000 |
|---|---|---|
| committer | eric fang <eric.fang@arm.com> | 2021-03-04 01:26:52 +0000 |
| commit | 726d704c32acf99a9ed44d81c99adb22d4759241 (patch) | |
| tree | 9c71c46f9ce4f73fbc2e59fef152934309ae9752 /src/cmd/asm/internal/asm/testdata/arm64error.s | |
| parent | 79beddc773ecca50c283dde6aad7c80929da0554 (diff) | |
| download | go-726d704c32acf99a9ed44d81c99adb22d4759241.tar.gz go-726d704c32acf99a9ed44d81c99adb22d4759241.zip | |
cmd/asm: add arm64 instructions VUMAX and VUMIN
This CL adds support for arm64 fp&simd instructions VUMAX and VUMIN.
Fixes #42326
Change-Id: I3757ba165dc31ce1ce70f3b06a9e5b94c14d2ab9
Reviewed-on: https://go-review.googlesource.com/c/go/+/271497
Trust: eric fang <eric.fang@arm.com>
Run-TryBot: eric fang <eric.fang@arm.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: fannie zhang <Fannie.Zhang@arm.com>
Reviewed-by: eric fang <eric.fang@arm.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64error.s | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s index 9b4f42a8ff..1c8eaa1752 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64error.s +++ b/src/cmd/asm/internal/asm/testdata/arm64error.s @@ -358,6 +358,10 @@ TEXT errors(SB),$0 VBIF V0.D2, V1.D2, V2.D2 // ERROR "invalid arrangement" VUADDW V9.B8, V12.H8, V14.B8 // ERROR "invalid arrangement" VUADDW2 V9.B8, V12.S4, V14.S4 // ERROR "operand mismatch" + VUMAX V1.D2, V2.D2, V3.D2 // ERROR "invalid arrangement" + VUMIN V1.D2, V2.D2, V3.D2 // ERROR "invalid arrangement" + VUMAX V1.B8, V2.B8, V3.B16 // ERROR "operand mismatch" + VUMIN V1.H4, V2.S4, V3.H4 // ERROR "operand mismatch" VSLI $64, V7.D2, V8.D2 // ERROR "shift out of range" VUSRA $0, V7.D2, V8.D2 // ERROR "shift out of range" CASPD (R3, R4), (R2), (R8, R9) // ERROR "source register pair must start from even register" |