diff options
| author | fanzha02 <fannie.zhang@arm.com> | 2017-12-08 08:19:32 +0000 |
|---|---|---|
| committer | Brad Fitzpatrick <bradfitz@golang.org> | 2018-04-09 18:20:41 +0000 |
| commit | 31700b83b5d9bdc2ddc474fd72b809a7b585d6da (patch) | |
| tree | fe4f875dfd824522743ad9d912d1c414fd582879 /src/cmd/asm/internal/asm/testdata/arm64error.s | |
| parent | 14393c5cd4fed812c87ba45fe4e2b8d07c02e8fa (diff) | |
| download | go-31700b83b5d9bdc2ddc474fd72b809a7b585d6da.tar.gz go-31700b83b5d9bdc2ddc474fd72b809a7b585d6da.zip | |
cmd/internal/obj/arm64: add assembler support for load with register offset
The patch adds support for LDR(register offset) instruction.
And add the test cases and negative tests.
Change-Id: I5b32c6a5065afc4571116d4896f7ebec3c0416d3
Reviewed-on: https://go-review.googlesource.com/87955
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64error.s | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s index 37e9442eca..4a1142e8a8 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64error.s +++ b/src/cmd/asm/internal/asm/testdata/arm64error.s @@ -5,12 +5,15 @@ TEXT errors(SB),$0 AND $1, RSP // ERROR "illegal combination" ANDS $1, R0, RSP // ERROR "illegal combination" - MOVD.P 300(R2), R3 // ERROR "offset out of range [-255,254]" - MOVD.P R3, 344(R2) // ERROR "offset out of range [-255,254]" ADDSW R7->32, R14, R13 // ERROR "shift amount out of range 0 to 31" - BICW R7@>33, R5, R16 // ERROR "shift amount out of range 0 to 31" ADD R1.UXTB<<5, R2, R3 // ERROR "shift amount out of range 0 to 4" ADDS R1.UXTX<<7, R2, R3 // ERROR "shift amount out of range 0 to 4" + BICW R7@>33, R5, R16 // ERROR "shift amount out of range 0 to 31" + MOVD.P 300(R2), R3 // ERROR "offset out of range [-255,254]" + MOVD.P R3, 344(R2) // ERROR "offset out of range [-255,254]" + MOVD (R3)(R7.SXTX<<2), R8 // ERROR "invalid index shift amount" + MOVWU (R5)(R4.UXTW<<3), R10 // ERROR "invalid index shift amount" + MOVWU (R5)(R4<<1), R10 // ERROR "invalid index shift amount" VLD1 (R8)(R13), [V2.B16] // ERROR "illegal combination" VLD1 8(R9), [V2.B16] // ERROR "illegal combination" VST1 [V1.B16], (R8)(R13) // ERROR "illegal combination" @@ -72,4 +75,8 @@ TEXT errors(SB),$0 VRBIT V1.H4, V2.H4 // ERROR "invalid arrangement" VUSHR $56, V1.D2, V2.H4 // ERROR "invalid arrangement" VUSHR $127, V1.D2, V2.D2 // ERROR "shift out of range" + VLD1.P (R8)(R9.SXTX<<2), [V2.B16] // ERROR "invalid extended register" + VLD1.P (R8)(R9<<2), [V2.B16] // ERROR "invalid extended register" + VST1.P [V1.B16], (R8)(R9.UXTW) // ERROR "invalid extended register" + VST1.P [V1.B16], (R8)(R9<<1) // ERROR "invalid extended register" RET |