diff options
author | Xiangdong Ji <xiangdong.ji@arm.com> | 2020-01-07 11:09:33 +0000 |
---|---|---|
committer | Cherry Zhang <cherryyz@google.com> | 2020-02-25 18:40:19 +0000 |
commit | 2783249068e415556e962c50d9427a21fdc9a875 (patch) | |
tree | e70819fae18bae067e9ae103162ef35d8b50f4b2 /src/cmd/asm/internal/asm/testdata/arm64error.s | |
parent | fe708385987231fa99d34df5b8c9d14afa0d35cf (diff) | |
download | go-2783249068e415556e962c50d9427a21fdc9a875.tar.gz go-2783249068e415556e962c50d9427a21fdc9a875.zip |
cmd/asm: add asimd instruction 'rev16' on arm64
Add support to the asimd instruction rev16 which reverses elements in
16-bit halfwords.
syntax:
VREV16 <Vn>.<T>, <Vd>.<T>
<T> should be either B8 or B16.
Change-Id: I7a7b8e772589c51ca9eb6dca98bab1aac863c6c2
Reviewed-on: https://go-review.googlesource.com/c/go/+/213738
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64error.s | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s index 7dfca1a1fe..0661a474b4 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64error.s +++ b/src/cmd/asm/internal/asm/testdata/arm64error.s @@ -106,6 +106,9 @@ TEXT errors(SB),$0 VST1.P [V1.B16], (R8)(R9<<1) // ERROR "invalid extended register" VREV64 V1.H4, V2.H8 // ERROR "invalid arrangement" VREV64 V1.D1, V2.D1 // ERROR "invalid arrangement" + VREV16 V1.D1, V2.D1 // ERROR "invalid arrangement" + VREV16 V1.B8, V2.B16 // ERROR "invalid arrangement" + VREV16 V1.H4, V2.H4 // ERROR "invalid arrangement" FLDPD (R0), (R1, R2) // ERROR "invalid register pair" FLDPD (R1), (F2, F2) // ERROR "constrained unpredictable behavior" FLDPS (R2), (F3, F3) // ERROR "constrained unpredictable behavior" |