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author | fanzha02 <fannie.zhang@arm.com> | 2020-05-08 10:51:29 +0800 |
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committer | fannie zhang <Fannie.Zhang@arm.com> | 2020-10-29 05:07:11 +0000 |
commit | 15131caeaa83e57fd8bdf87dde2801443f5602db (patch) | |
tree | 0a052c4bb4ee66b59a3e58e0b13934454e5c9d1c /src/cmd/asm/internal/asm/testdata/arm64error.s | |
parent | 53efbdb12e056c5fd4e967f07c7e660377f7aba9 (diff) | |
download | go-15131caeaa83e57fd8bdf87dde2801443f5602db.tar.gz go-15131caeaa83e57fd8bdf87dde2801443f5602db.zip |
cmd/internal/obj/arm64: add CASx/CASPx instructions
This patch adds support for CASx and CASPx atomic instructions.
go syntax gnu syntax
CASD Rs, (Rn|RSP), Rt => cas Xs, Xt, (Xn|SP)
CASALW Rs, (Rn|RSP), Rt => casal Ws, Wt, (Xn|SP)
CASPD (Rs, Rs+1), (Rn|RSP), (Rt, Rt+1) => casp Xs, Xs+1, Xt, Xt+1, (Xn|SP)
CASPW (Rs, Rs+1), (Rn|RSP), (Rt, Rt+1) => casp Ws, Ws+1, Wt, Wt+1, (Xn|SP)
This patch changes the type of prog.RestArgs from "[]Addr" to
"[]struct{Addr, Pos}", Pos is a enum, indicating the position of
the operand.
This patch also adds test cases.
Change-Id: Ib971cfda7890b7aa895d17bab22dea326c7fcaa4
Reviewed-on: https://go-review.googlesource.com/c/go/+/233277
Trust: fannie zhang <Fannie.Zhang@arm.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal/asm/testdata/arm64error.s')
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64error.s | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64error.s b/src/cmd/asm/internal/asm/testdata/arm64error.s index c3a617066a..99e4d62d25 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64error.s +++ b/src/cmd/asm/internal/asm/testdata/arm64error.s @@ -357,4 +357,8 @@ TEXT errors(SB),$0 VUADDW2 V9.B8, V12.S4, V14.S4 // ERROR "operand mismatch" VSLI $64, V7.D2, V8.D2 // ERROR "shift out of range" VUSRA $0, V7.D2, V8.D2 // ERROR "shift out of range" + CASPD (R3, R4), (R2), (R8, R9) // ERROR "source register pair must start from even register" + CASPD (R2, R3), (R2), (R9, R10) // ERROR "destination register pair must start from even register" + CASPD (R2, R4), (R2), (R8, R9) // ERROR "source register pair must be contiguous" + CASPD (R2, R3), (R2), (R8, R10) // ERROR "destination register pair must be contiguous" RET |