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author | Rob Pike <r@golang.org> | 2015-02-23 11:49:36 -0800 |
---|---|---|
committer | Rob Pike <r@golang.org> | 2015-02-23 19:54:39 +0000 |
commit | 9d6ed4af66e588cf7e9b45e397b53c80bacdc951 (patch) | |
tree | 447a570b95857feec005811653bfdc4026853621 | |
parent | 264c099ba7988a30ba8d3088c0e925524655383c (diff) | |
download | go-9d6ed4af66e588cf7e9b45e397b53c80bacdc951.tar.gz go-9d6ed4af66e588cf7e9b45e397b53c80bacdc951.zip |
[dev.cc] cmd/asm: add end to end test for amd64
Change-Id: I40839c2d1c0c105a5ba9aadcb55a13693bf4afa6
Reviewed-on: https://go-review.googlesource.com/5592
Reviewed-by: Russ Cox <rsc@golang.org>
-rw-r--r-- | src/cmd/asm/internal/asm/endtoend_test.go | 4 | ||||
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/amd64.out | 56 | ||||
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/amd64.s | 93 | ||||
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm.out | 106 | ||||
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm.s | 4 | ||||
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/ppc64.s | 4 |
6 files changed, 212 insertions, 55 deletions
diff --git a/src/cmd/asm/internal/asm/endtoend_test.go b/src/cmd/asm/internal/asm/endtoend_test.go index 5ee6e80d2b..de80563a7c 100644 --- a/src/cmd/asm/internal/asm/endtoend_test.go +++ b/src/cmd/asm/internal/asm/endtoend_test.go @@ -77,3 +77,7 @@ func TestPPC64EndToEnd(t *testing.T) { func TestARMEndToEnd(t *testing.T) { testEndToEnd(t, "arm") } + +func TestAMD64EndToEnd(t *testing.T) { + testEndToEnd(t, "amd64") +} diff --git a/src/cmd/asm/internal/asm/testdata/amd64.out b/src/cmd/asm/internal/asm/testdata/amd64.out new file mode 100644 index 0000000000..725c3dfa5d --- /dev/null +++ b/src/cmd/asm/internal/asm/testdata/amd64.out @@ -0,0 +1,56 @@ +5 00001 (testdata/amd64.s:5) TEXT foo+0(SB),$0 +8 00002 (testdata/amd64.s:8) NEGQ ,R11 +9 00003 (testdata/amd64.s:9) NEGQ ,4(R11) +10 00004 (testdata/amd64.s:10) NEGQ ,foo+4(SB) +13 00005 (testdata/amd64.s:13) INT $4, +14 00006 (testdata/amd64.s:14) DIVB R11, +15 00007 (testdata/amd64.s:15) DIVB 4(R11), +16 00008 (testdata/amd64.s:16) DIVB foo+4(SB), +19 00009 (testdata/amd64.s:19) SUBQ $4,DI +20 00010 (testdata/amd64.s:20) SUBQ R11,DI +21 00011 (testdata/amd64.s:21) SUBQ 4(R11),DI +22 00012 (testdata/amd64.s:22) SUBQ foo+4(SB),DI +23 00013 (testdata/amd64.s:23) SUBQ $4,8(R12) +24 00014 (testdata/amd64.s:24) SUBQ R11,8(R12) +25 00015 (testdata/amd64.s:25) SUBQ R11,foo+4(SB) +28 00016 (testdata/amd64.s:28) CMPB CX,$4 +32 00017 (testdata/amd64.s:32) JCS ,13(PC) +33 00018 (testdata/amd64.s:33) JCS ,17 +36 00019 (testdata/amd64.s:36) JMP ,15(PC) +37 00020 (testdata/amd64.s:37) JMP ,17 +38 00021 (testdata/amd64.s:38) JMP ,foo+4(SB) +39 00022 (testdata/amd64.s:39) JMP ,bar<>+4(SB) +40 00023 (testdata/amd64.s:40) JMP ,bar<>+4(SB)(R11*4) +41 00024 (testdata/amd64.s:41) JMP ,4(SP) +42 00025 (testdata/amd64.s:42) JMP ,(R12) +44 00026 (testdata/amd64.s:44) JMP ,(R12)(R13*4) +45 00027 (testdata/amd64.s:45) JMP ,(AX) +46 00028 (testdata/amd64.s:46) JMP ,(SP) +48 00029 (testdata/amd64.s:48) JMP ,(AX)(AX*4) +49 00030 (testdata/amd64.s:49) JMP ,4(SP) +50 00031 (testdata/amd64.s:50) JMP ,(R12) +52 00032 (testdata/amd64.s:52) JMP ,(R12)(R13*4) +53 00033 (testdata/amd64.s:53) JMP ,(AX) +54 00034 (testdata/amd64.s:54) JMP ,(SP) +56 00035 (testdata/amd64.s:56) JMP ,(AX)(AX*4) +57 00036 (testdata/amd64.s:57) JMP ,R13 +60 00037 (testdata/amd64.s:60) NOP , +61 00038 (testdata/amd64.s:61) NOP AX, +62 00039 (testdata/amd64.s:62) NOP foo+4(SB), +65 00040 (testdata/amd64.s:65) SHLL R11,R12 +66 00041 (testdata/amd64.s:66) SHLL R11,foo+4(SB) +67 00042 (testdata/amd64.s:67) SHLL R11,R11:AX +70 00043 (testdata/amd64.s:70) MOVL AX,R11 +71 00044 (testdata/amd64.s:71) MOVL $4,R11 +72 00045 (testdata/amd64.s:72) MOVL AX,AX:CS +75 00046 (testdata/amd64.s:75) IMULB $4, +76 00047 (testdata/amd64.s:76) IMULB R11, +77 00048 (testdata/amd64.s:77) IMULB $4,R11 +78 00049 (testdata/amd64.s:78) IMULB R11,R12 +79 00050 (testdata/amd64.s:79) IMULB R11,foo+4(SB) +82 00051 (testdata/amd64.s:82) CMPPD R11,$4,R12 +83 00052 (testdata/amd64.s:83) CMPPD R11,foo+4(SB) +86 00053 (testdata/amd64.s:86) PINSRW R11,$4,AX +87 00054 (testdata/amd64.s:87) PINSRW foo+4(SB),$4,AX +90 00055 (testdata/amd64.s:90) RETFL $4, +93 00056 (testdata/amd64.s:93) RET , diff --git a/src/cmd/asm/internal/asm/testdata/amd64.s b/src/cmd/asm/internal/asm/testdata/amd64.s new file mode 100644 index 0000000000..cb925f2475 --- /dev/null +++ b/src/cmd/asm/internal/asm/testdata/amd64.s @@ -0,0 +1,93 @@ +// This input was created by taking the instruction productions in +// the old assembler's (6a's) grammar and hand-writing complete +// instructions for each rule, to guarantee we cover the same space. + +TEXT foo(SB), 0, $0 + +// LTYPE1 nonrem { outcode($1, &$2); } + NEGQ R11 + NEGQ 4(R11) + NEGQ foo+4(SB) + +// LTYPE2 rimnon { outcode($1, &$2); } + INT $4 + DIVB R11 + DIVB 4(R11) + DIVB foo+4(SB) + +// LTYPE3 rimrem { outcode($1, &$2); } + SUBQ $4, DI + SUBQ R11, DI + SUBQ 4(R11), DI + SUBQ foo+4(SB), DI + SUBQ $4, 8(R12) + SUBQ R11, 8(R12) + SUBQ R11, foo+4(SB) + +// LTYPE4 remrim { outcode($1, &$2); } + CMPB CX, $4 + +// LTYPER nonrel { outcode($1, &$2); } +label: + JB -4(PC) + JB label + +// LTYPEC spec3 { outcode($1, &$2); } + JMP -4(PC) + JMP label + JMP foo+4(SB) + JMP bar<>+4(SB) + JMP bar<>+4(SB)(R11*4) + JMP *4(SP) + JMP *(R12) + JMP *(R12*4) + JMP *(R12)(R13*4) + JMP *(AX) + JMP *(SP) + JMP *(AX*4) + JMP *(AX)(AX*4) + JMP 4(SP) + JMP (R12) + JMP (R12*4) + JMP (R12)(R13*4) + JMP (AX) + JMP (SP) + JMP (AX*4) + JMP (AX)(AX*4) + JMP R13 + +// LTYPEN spec4 { outcode($1, &$2); } + NOP + NOP AX + NOP foo+4(SB) + +// LTYPES spec5 { outcode($1, &$2); } + SHLL R11, R12 + SHLL R11, foo+4(SB) + SHLL R11, R11:AX + +// LTYPEM spec6 { outcode($1, &$2); } + MOVL AX, R11 + MOVL $4, R11 + MOVL AX, AX:CS + +// LTYPEI spec7 { outcode($1, &$2); } + IMULB $4 + IMULB R11 + IMULB $4, R11 + IMULB R11, R12 + IMULB R11, foo+4(SB) + +// LTYPEXC spec8 { outcode($1, &$2); } + CMPPD R11, R12, 4 + CMPPD R11, foo+4(SB), 4 + +// LTYPEX spec9 { outcode($1, &$2); } + PINSRW $4, R11, AX + PINSRW $4, foo+4(SB), AX + +// LTYPERT spec10 { outcode($1, &$2); } + RETFL $4 + +// LTYPE0 nonnon { outcode($1, &$2); } + RET diff --git a/src/cmd/asm/internal/asm/testdata/arm.out b/src/cmd/asm/internal/asm/testdata/arm.out index 88309bd5a4..7728e09a45 100644 --- a/src/cmd/asm/internal/asm/testdata/arm.out +++ b/src/cmd/asm/internal/asm/testdata/arm.out @@ -1,53 +1,53 @@ -1 00001 (testdata/arm.s:1) TEXT foo+0(SB),0,$0 -10 00002 (testdata/arm.s:10) ADD $1,R2,R3 -11 00003 (testdata/arm.s:11) ADD R1<<R2,R3,R4 -12 00004 (testdata/arm.s:12) ADD R1>>R2,R3,R4 -13 00005 (testdata/arm.s:13) ADD R1@>R2,R3,R4 -14 00006 (testdata/arm.s:14) ADD R1->R2,R3,R4 -15 00007 (testdata/arm.s:15) ADD R1,R2,R3 -16 00008 (testdata/arm.s:16) ADD R1<<R2,R3,R4 -26 00009 (testdata/arm.s:26) ADD $1,R2 -27 00010 (testdata/arm.s:27) ADD R1<<R2,R3 -28 00011 (testdata/arm.s:28) ADD R1>>R2,R3 -29 00012 (testdata/arm.s:29) ADD R1@>R2,R3 -30 00013 (testdata/arm.s:30) ADD R1->R2,R3 -31 00014 (testdata/arm.s:31) ADD R1,R2 -40 00015 (testdata/arm.s:40) CLZ.S R1,R2 -49 00016 (testdata/arm.s:49) MOVW.S R1,R2 -50 00017 (testdata/arm.s:50) MOVW.S $1,R2 -51 00018 (testdata/arm.s:51) MOVW.S R1<<R2,R3 -60 00019 (testdata/arm.s:60) JMP.S ,20(PC) -66 00020 (testdata/arm.s:66) JMP.S ,0(R2) -67 00021 (testdata/arm.s:67) JMP.S ,foo+0(SB) -68 00022 (testdata/arm.s:68) JMP.S ,bar<>+0(SB) -77 00023 (testdata/arm.s:77) BX 0(R2), -86 00024 (testdata/arm.s:86) BEQ ,25(PC) -95 00025 (testdata/arm.s:95) SWI.S ,R1 -96 00026 (testdata/arm.s:96) SWI.S ,0(R1) -97 00027 (testdata/arm.s:97) SWI.S ,foo+0(SB) -106 00028 (testdata/arm.s:106) CMP.S $1,R2, -107 00029 (testdata/arm.s:107) CMP.S R1<<R2,R3, -108 00030 (testdata/arm.s:108) CMP.S R1,R2, -122 00031 (testdata/arm.s:122) MOVM 0(R1),[R2,R5,R8,R10] -123 00032 (testdata/arm.s:123) MOVM 0(R1),[R2,R3,R4,R5] -124 00033 (testdata/arm.s:124) MOVM.S 0(R1),[R2] -135 00034 (testdata/arm.s:135) MOVM [R2,R5,R8,R10],0(R1) -136 00035 (testdata/arm.s:136) MOVM [R2,R3,R4,R5],0(R1) -137 00036 (testdata/arm.s:137) MOVM.S [R2],0(R1) -146 00037 (testdata/arm.s:146) STREX.S 0(R2),R1,R3 -152 00038 (testdata/arm.s:152) STREX.S 0(R2),R1,R1 -158 00039 (testdata/arm.s:158) STREX.S 0(R2),R3,R3 -166 00040 (testdata/arm.s:166) CASE.S R1, -175 00041 (testdata/arm.s:175) WORD ,$1234 -184 00042 (testdata/arm.s:184) ABSF.S F1,F2 -190 00043 (testdata/arm.s:190) ADDD.S F1,F2 -191 00044 (testdata/arm.s:191) ADDD.S $0.5,F2 -197 00045 (testdata/arm.s:197) ADDD.S F1,F2,F3 -198 00046 (testdata/arm.s:198) ADDD.S $0.5,F2,F3 -204 00047 (testdata/arm.s:204) CMPD.S F1,F2 -238 00048 (testdata/arm.s:238) MULL R1,R2,(R3, R4) -250 00049 (testdata/arm.s:250) MULAWT R1,R2,R3, R4 -258 00050 (testdata/arm.s:258) PLD 0(R1), -259 00051 (testdata/arm.s:259) PLD 4(R1), -268 00052 (testdata/arm.s:268) RET , -277 00053 (testdata/arm.s:277) END , +5 00001 (testdata/arm.s:5) TEXT foo+0(SB),0,$0 +14 00002 (testdata/arm.s:14) ADD $1,R2,R3 +15 00003 (testdata/arm.s:15) ADD R1<<R2,R3,R4 +16 00004 (testdata/arm.s:16) ADD R1>>R2,R3,R4 +17 00005 (testdata/arm.s:17) ADD R1@>R2,R3,R4 +18 00006 (testdata/arm.s:18) ADD R1->R2,R3,R4 +19 00007 (testdata/arm.s:19) ADD R1,R2,R3 +20 00008 (testdata/arm.s:20) ADD R1<<R2,R3,R4 +30 00009 (testdata/arm.s:30) ADD $1,R2 +31 00010 (testdata/arm.s:31) ADD R1<<R2,R3 +32 00011 (testdata/arm.s:32) ADD R1>>R2,R3 +33 00012 (testdata/arm.s:33) ADD R1@>R2,R3 +34 00013 (testdata/arm.s:34) ADD R1->R2,R3 +35 00014 (testdata/arm.s:35) ADD R1,R2 +44 00015 (testdata/arm.s:44) CLZ.S R1,R2 +53 00016 (testdata/arm.s:53) MOVW.S R1,R2 +54 00017 (testdata/arm.s:54) MOVW.S $1,R2 +55 00018 (testdata/arm.s:55) MOVW.S R1<<R2,R3 +64 00019 (testdata/arm.s:64) JMP.S ,20(PC) +70 00020 (testdata/arm.s:70) JMP.S ,0(R2) +71 00021 (testdata/arm.s:71) JMP.S ,foo+0(SB) +72 00022 (testdata/arm.s:72) JMP.S ,bar<>+0(SB) +81 00023 (testdata/arm.s:81) BX 0(R2), +90 00024 (testdata/arm.s:90) BEQ ,25(PC) +99 00025 (testdata/arm.s:99) SWI.S ,R1 +100 00026 (testdata/arm.s:100) SWI.S ,0(R1) +101 00027 (testdata/arm.s:101) SWI.S ,foo+0(SB) +110 00028 (testdata/arm.s:110) CMP.S $1,R2, +111 00029 (testdata/arm.s:111) CMP.S R1<<R2,R3, +112 00030 (testdata/arm.s:112) CMP.S R1,R2, +126 00031 (testdata/arm.s:126) MOVM 0(R1),[R2,R5,R8,R10] +127 00032 (testdata/arm.s:127) MOVM 0(R1),[R2,R3,R4,R5] +128 00033 (testdata/arm.s:128) MOVM.S 0(R1),[R2] +139 00034 (testdata/arm.s:139) MOVM [R2,R5,R8,R10],0(R1) +140 00035 (testdata/arm.s:140) MOVM [R2,R3,R4,R5],0(R1) +141 00036 (testdata/arm.s:141) MOVM.S [R2],0(R1) +150 00037 (testdata/arm.s:150) STREX.S 0(R2),R1,R3 +156 00038 (testdata/arm.s:156) STREX.S 0(R2),R1,R1 +162 00039 (testdata/arm.s:162) STREX.S 0(R2),R3,R3 +170 00040 (testdata/arm.s:170) CASE.S R1, +179 00041 (testdata/arm.s:179) WORD ,$1234 +188 00042 (testdata/arm.s:188) ABSF.S F1,F2 +194 00043 (testdata/arm.s:194) ADDD.S F1,F2 +195 00044 (testdata/arm.s:195) ADDD.S $0.5,F2 +201 00045 (testdata/arm.s:201) ADDD.S F1,F2,F3 +202 00046 (testdata/arm.s:202) ADDD.S $0.5,F2,F3 +208 00047 (testdata/arm.s:208) CMPD.S F1,F2 +242 00048 (testdata/arm.s:242) MULL R1,R2,(R3, R4) +254 00049 (testdata/arm.s:254) MULAWT R1,R2,R3, R4 +262 00050 (testdata/arm.s:262) PLD 0(R1), +263 00051 (testdata/arm.s:263) PLD 4(R1), +272 00052 (testdata/arm.s:272) RET , +281 00053 (testdata/arm.s:281) END , diff --git a/src/cmd/asm/internal/asm/testdata/arm.s b/src/cmd/asm/internal/asm/testdata/arm.s index 126405eafa..8031075da9 100644 --- a/src/cmd/asm/internal/asm/testdata/arm.s +++ b/src/cmd/asm/internal/asm/testdata/arm.s @@ -1,3 +1,7 @@ +// This input was created by taking the instruction productions in +// the old assembler's (5a's) grammar and hand-writing complete +// instructions for each rule, to guarantee we cover the same space. + TEXT foo(SB), 0, $0 // ADD diff --git a/src/cmd/asm/internal/asm/testdata/ppc64.s b/src/cmd/asm/internal/asm/testdata/ppc64.s index 1fb53982c1..b1cde45687 100644 --- a/src/cmd/asm/internal/asm/testdata/ppc64.s +++ b/src/cmd/asm/internal/asm/testdata/ppc64.s @@ -1,6 +1,6 @@ // This input was created by taking the instruction productions in -// the old assembler's (9a's) grammar and hand-writing one complete -// instruction for each rule, to guarantee we cover the same space. +// the old assembler's (9a's) grammar and hand-writing complete +// instructions for each rule, to guarantee we cover the same space. TEXT foo(SB),0,$0 |