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path: root/src/cmd/compile/internal/ssa/opGen.go
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Diffstat (limited to 'src/cmd/compile/internal/ssa/opGen.go')
-rw-r--r--src/cmd/compile/internal/ssa/opGen.go31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 68b60f2180..7968b1de2f 100644
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -510,6 +510,7 @@ const (
OpAMD64LEAQ2
OpAMD64LEAQ4
OpAMD64LEAQ8
+ OpAMD64LEAL
OpAMD64MOVBload
OpAMD64MOVBQSXload
OpAMD64MOVWload
@@ -563,6 +564,7 @@ const (
OpAMD64LoweredGetClosurePtr
OpAMD64LoweredNilCheck
OpAMD64MOVQconvert
+ OpAMD64MOVLconvert
OpAMD64FlagEQ
OpAMD64FlagLT_ULT
OpAMD64FlagLT_UGT
@@ -5926,6 +5928,7 @@ var opcodeTable = [...]opInfo{
auxType: auxSymOff,
argLen: 1,
rematerializeable: true,
+ asm: x86.ALEAQ,
reg: regInfo{
inputs: []inputInfo{
{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
@@ -5992,6 +5995,21 @@ var opcodeTable = [...]opInfo{
},
},
{
+ name: "LEAL",
+ auxType: auxSymOff,
+ argLen: 1,
+ rematerializeable: true,
+ asm: x86.ALEAL,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+ },
+ outputs: []outputInfo{
+ {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+ },
+ },
+ },
+ {
name: "MOVBload",
auxType: auxSymOff,
argLen: 2,
@@ -6647,6 +6665,19 @@ var opcodeTable = [...]opInfo{
},
},
{
+ name: "MOVLconvert",
+ argLen: 2,
+ asm: x86.AMOVL,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+ },
+ outputs: []outputInfo{
+ {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+ },
+ },
+ },
+ {
name: "FlagEQ",
argLen: 0,
reg: regInfo{},