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author | Cherry Mui <cherryyz@google.com> | 2022-01-18 18:36:00 -0500 |
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committer | Cherry Mui <cherryyz@google.com> | 2022-02-07 17:28:40 +0000 |
commit | fcd482a2d014137d8c20bf02bcc8fe37b107eb8c (patch) | |
tree | 0660254ed66e8c4b65d9646681cc218e83b167d0 /src | |
parent | 0a15110f0851542732e2e0fa10fcc2114c306c7a (diff) | |
download | go-fcd482a2d014137d8c20bf02bcc8fe37b107eb8c.tar.gz go-fcd482a2d014137d8c20bf02bcc8fe37b107eb8c.zip |
[release-branch.go1.16] cmd/compile: don't elide extension for LoadReg to FP register on MIPS64
For an extension operation like MOVWreg, if the operand is already
extended, we optimize the second extension out. Usually a LoadReg
of a proper type would come already extended, as a MOVW/MOVWU etc.
instruction does. But for a LoadReg to a floating point register,
the instruction does not do the extension. So we cannot elide the
extension.
Updates #50671.
Fixes #50682.
Change-Id: Id8991df78d5acdecd3fd6138c558428cbd5f6ba3
Reviewed-on: https://go-review.googlesource.com/c/go/+/379236
Trust: Cherry Mui <cherryyz@google.com>
Run-TryBot: Cherry Mui <cherryyz@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
(cherry picked from commit d93ff73ae207763871bee38590242be968b2e743)
Reviewed-on: https://go-review.googlesource.com/c/go/+/379515
Diffstat (limited to 'src')
-rw-r--r-- | src/cmd/compile/internal/mips64/ssa.go | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/cmd/compile/internal/mips64/ssa.go b/src/cmd/compile/internal/mips64/ssa.go index 2727c4d8a8..b0e0165ad8 100644 --- a/src/cmd/compile/internal/mips64/ssa.go +++ b/src/cmd/compile/internal/mips64/ssa.go @@ -321,7 +321,10 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) { for a.Op == ssa.OpCopy || a.Op == ssa.OpMIPS64MOVVreg { a = a.Args[0] } - if a.Op == ssa.OpLoadReg { + if a.Op == ssa.OpLoadReg && mips.REG_R0 <= a.Reg() && a.Reg() <= mips.REG_R31 { + // LoadReg from a narrower type does an extension, except loading + // to a floating point register. So only eliminate the extension + // if it is loaded to an integer register. t := a.Type switch { case v.Op == ssa.OpMIPS64MOVBreg && t.Size() == 1 && t.IsSigned(), |