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authorKeith Randall <khr@golang.org>2020-11-20 13:53:05 -0800
committerCarlos Amedee <carlos@golang.org>2020-12-03 13:58:28 +0000
commita2adbc876e9362f064afffcb51ce677e2f988c5e (patch)
treedd0eef170fd18e20dd1fc91a9d49f31054f928d4 /src
parent16ddb8bc763c33fb172d0c1bcd04d070f36f9cc8 (diff)
downloadgo-a2adbc876e9362f064afffcb51ce677e2f988c5e.tar.gz
go-a2adbc876e9362f064afffcb51ce677e2f988c5e.zip
[release-branch.go1.15] cmd/compile: sign extend consant folding properly
MOVLconst must have a properly sign-extended auxint constant. The bit operations in these rules don't enforce that invariant. The easiest fix is just to turn on properly typed auxint fields (which is what fixed this issue at tip). Fixes #42753 Change-Id: I264245fad45067a6ade65326f7fe681feb5f3739 Reviewed-on: https://go-review.googlesource.com/c/go/+/272028 Trust: Keith Randall <khr@golang.org> Run-TryBot: Keith Randall <khr@golang.org> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/cmd/compile/internal/ssa/gen/AMD64.rules6
-rw-r--r--src/cmd/compile/internal/ssa/rewriteAMD64.go18
2 files changed, 12 insertions, 12 deletions
diff --git a/src/cmd/compile/internal/ssa/gen/AMD64.rules b/src/cmd/compile/internal/ssa/gen/AMD64.rules
index ee9ccfb41c..f7eb92dc8b 100644
--- a/src/cmd/compile/internal/ssa/gen/AMD64.rules
+++ b/src/cmd/compile/internal/ssa/gen/AMD64.rules
@@ -1429,11 +1429,11 @@
(NOTQ (MOVQconst [c])) -> (MOVQconst [^c])
(NOTL (MOVLconst [c])) -> (MOVLconst [^c])
(BTSQconst [c] (MOVQconst [d])) -> (MOVQconst [d|(1<<uint32(c))])
-(BTSLconst [c] (MOVLconst [d])) -> (MOVLconst [d|(1<<uint32(c))])
+(BTSLconst [c] (MOVLconst [d])) => (MOVLconst [d|(1<<uint32(c))])
(BTRQconst [c] (MOVQconst [d])) -> (MOVQconst [d&^(1<<uint32(c))])
-(BTRLconst [c] (MOVLconst [d])) -> (MOVLconst [d&^(1<<uint32(c))])
+(BTRLconst [c] (MOVLconst [d])) => (MOVLconst [d&^(1<<uint32(c))])
(BTCQconst [c] (MOVQconst [d])) -> (MOVQconst [d^(1<<uint32(c))])
-(BTCLconst [c] (MOVLconst [d])) -> (MOVLconst [d^(1<<uint32(c))])
+(BTCLconst [c] (MOVLconst [d])) => (MOVLconst [d^(1<<uint32(c))])
// If c or d doesn't fit into 32 bits, then we can't construct ORQconst,
// but we can still constant-fold.
diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go
index 72ed1eb62c..e59fa208c1 100644
--- a/src/cmd/compile/internal/ssa/rewriteAMD64.go
+++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go
@@ -3526,13 +3526,13 @@ func rewriteValueAMD64_OpAMD64BTCLconst(v *Value) bool {
// match: (BTCLconst [c] (MOVLconst [d]))
// result: (MOVLconst [d^(1<<uint32(c))])
for {
- c := v.AuxInt
+ c := auxIntToInt8(v.AuxInt)
if v_0.Op != OpAMD64MOVLconst {
break
}
- d := v_0.AuxInt
+ d := auxIntToInt32(v_0.AuxInt)
v.reset(OpAMD64MOVLconst)
- v.AuxInt = d ^ (1 << uint32(c))
+ v.AuxInt = int32ToAuxInt(d ^ (1 << uint32(c)))
return true
}
return false
@@ -4010,13 +4010,13 @@ func rewriteValueAMD64_OpAMD64BTRLconst(v *Value) bool {
// match: (BTRLconst [c] (MOVLconst [d]))
// result: (MOVLconst [d&^(1<<uint32(c))])
for {
- c := v.AuxInt
+ c := auxIntToInt8(v.AuxInt)
if v_0.Op != OpAMD64MOVLconst {
break
}
- d := v_0.AuxInt
+ d := auxIntToInt32(v_0.AuxInt)
v.reset(OpAMD64MOVLconst)
- v.AuxInt = d &^ (1 << uint32(c))
+ v.AuxInt = int32ToAuxInt(d &^ (1 << uint32(c)))
return true
}
return false
@@ -4356,13 +4356,13 @@ func rewriteValueAMD64_OpAMD64BTSLconst(v *Value) bool {
// match: (BTSLconst [c] (MOVLconst [d]))
// result: (MOVLconst [d|(1<<uint32(c))])
for {
- c := v.AuxInt
+ c := auxIntToInt8(v.AuxInt)
if v_0.Op != OpAMD64MOVLconst {
break
}
- d := v_0.AuxInt
+ d := auxIntToInt32(v_0.AuxInt)
v.reset(OpAMD64MOVLconst)
- v.AuxInt = d | (1 << uint32(c))
+ v.AuxInt = int32ToAuxInt(d | (1 << uint32(c)))
return true
}
return false