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| author | Jeremy Faller <jeremy@golang.org> | 2020-09-30 17:57:14 -0400 |
|---|---|---|
| committer | Jeremy Faller <jeremy@golang.org> | 2020-09-30 18:00:58 -0400 |
| commit | 91e4d2d57bc341dd82c98247117114c851380aef (patch) | |
| tree | 15a2d023cdc63543cf8a6e99f8a561c0a0459000 /src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go | |
| parent | c863e14a6c15e174ac0979ddd7f9530d6a4ec9cc (diff) | |
| parent | 846dce9d05f19a1f53465e62a304dea21b99f910 (diff) | |
| download | go-91e4d2d57bc341dd82c98247117114c851380aef.tar.gz go-91e4d2d57bc341dd82c98247117114c851380aef.zip | |
[dev.link] Merge branch 'master' into dev.link
2 conflicts, that make sense.
src/cmd/internal/obj/objfile.go
src/cmd/link/internal/loader/loader.go
Change-Id: Ib224e2d248cb568fa1e888af79dd908b2f5e05ff
Diffstat (limited to 'src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go')
| -rw-r--r-- | src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go b/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go index 250d3b7193..102f836145 100644 --- a/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go +++ b/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go @@ -730,6 +730,7 @@ const ( LXV LXVL LXVLL + LXVX STXSDX STXSIWX STXSSPX @@ -738,6 +739,7 @@ const ( STXV STXVL STXVLL + STXVX XSABSDP XSADDDP XSADDSP @@ -2098,6 +2100,7 @@ var opstr = [...]string{ LXV: "lxv", LXVL: "lxvl", LXVLL: "lxvll", + LXVX: "lxvx", STXSDX: "stxsdx", STXSIWX: "stxsiwx", STXSSPX: "stxsspx", @@ -2106,6 +2109,7 @@ var opstr = [...]string{ STXV: "stxv", STXVL: "stxvl", STXVLL: "stxvll", + STXVX: "stxvx", XSABSDP: "xsabsdp", XSADDDP: "xsadddp", XSADDSP: "xsaddsp", @@ -4266,6 +4270,8 @@ var instFormats = [...]instFormat{ [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, {LXVLL, 0xfc0007fe, 0x7c00025a, 0x0, // Load VSX Vector Left-justified with Length X-form (lxvll XT,RA,RB) [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, + {LXVX, 0xfc0007fe, 0x7c000218, 0x0, // Load VSX Vector Indexed X-form (lxvx XT,RA,RB) + [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, {STXSDX, 0xfc0007fe, 0x7c000598, 0x0, // Store VSX Scalar Doubleword Indexed XX1-form (stxsdx XS,RA,RB) [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, {STXSIWX, 0xfc0007fe, 0x7c000118, 0x0, // Store VSX Scalar as Integer Word Indexed XX1-form (stxsiwx XS,RA,RB) @@ -4282,6 +4288,8 @@ var instFormats = [...]instFormat{ [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, {STXVLL, 0xfc0007fe, 0x7c00035a, 0x0, // Store VSX Vector Left-justified with Length X-form (stxvll XS,RA,RB) [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, + {STXVX, 0xfc0007fe, 0x7c000318, 0x0, // Store VSX Vector Indexed X-form (stxvx XS,RA,RB) + [5]*argField{ap_VecSReg_31_31_6_10, ap_Reg_11_15, ap_Reg_16_20}}, {XSABSDP, 0xfc0007fc, 0xf0000564, 0x1f0000, // VSX Scalar Absolute Value Double-Precision XX2-form (xsabsdp XT,XB) [5]*argField{ap_VecSReg_31_31_6_10, ap_VecSReg_30_30_16_20}}, {XSADDDP, 0xfc0007f8, 0xf0000100, 0x0, // VSX Scalar Add Double-Precision XX3-form (xsadddp XT,XA,XB) |