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authorCherry Mui <cherryyz@google.com>2021-05-25 19:49:08 -0400
committerCherry Mui <cherryyz@google.com>2021-05-26 23:26:51 +0000
commitcf23daeda3792eb2ba07c30823d5a0c8667f5083 (patch)
tree82eae11e0816ee98e061cf7a4303c48fcce4e143 /src/cmd/compile/internal/ssa/schedule.go
parent4ed6317e735af24093b96077d1e813cc8b7dee6a (diff)
downloadgo-cf23daeda3792eb2ba07c30823d5a0c8667f5083.tar.gz
go-cf23daeda3792eb2ba07c30823d5a0c8667f5083.zip
[dev.typeparams] cmd/compile: do not schedule in-register args late, even for block control
In the scheduler we have the logic that if a Value is used as the block's control, we schedule it at the end, except for Phis and Args. Even the comment says so, the code doesn't exclude in-register Args (OpArgXXXReg). Change to check for score instead, which includes OpArgXXXRegs. It also includes GetClosurePtr, which must be scheduled early. We just happen to never use it as block control. Found when working on ARM64 register ABI. In theory this could apply to AMD64 as well. But on AMD64 we never use in-register Value as block control, as conditional branch is always based on FLAGS, never based on registers, so it doesn't actually cause any problem. Change-Id: I167a550309772639574f7468caf91bd805eb74c6 Reviewed-on: https://go-review.googlesource.com/c/go/+/322849 Trust: Cherry Mui <cherryyz@google.com> Run-TryBot: Cherry Mui <cherryyz@google.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Than McIntosh <thanm@google.com> Reviewed-by: David Chase <drchase@google.com>
Diffstat (limited to 'src/cmd/compile/internal/ssa/schedule.go')
-rw-r--r--src/cmd/compile/internal/ssa/schedule.go2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cmd/compile/internal/ssa/schedule.go b/src/cmd/compile/internal/ssa/schedule.go
index 4e3e5e75e3..c5130b2ee5 100644
--- a/src/cmd/compile/internal/ssa/schedule.go
+++ b/src/cmd/compile/internal/ssa/schedule.go
@@ -220,7 +220,7 @@ func schedule(f *Func) {
// unless they are phi values (which must be first).
// OpArg also goes first -- if it is stack it register allocates
// to a LoadReg, if it is register it is from the beginning anyway.
- if c.Op == OpPhi || c.Op == OpArg {
+ if score[c.ID] == ScorePhi || score[c.ID] == ScoreArg {
continue
}
score[c.ID] = ScoreControl