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author | Alberto Donizetti <alb.donizetti@gmail.com> | 2020-10-28 10:10:55 +0100 |
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committer | Alberto Donizetti <alb.donizetti@gmail.com> | 2020-10-28 19:19:18 +0000 |
commit | 1090f0986dd9d7e1f3c31a7f70f45d02ccf49964 (patch) | |
tree | c9319051d9ad1b3e45374dd74720e387b366d3e7 /src/cmd/compile/internal/ssa/rewriteARM.go | |
parent | bc0d7fd9b7b2a8791441a07921b0c26b7b316b92 (diff) | |
download | go-1090f0986dd9d7e1f3c31a7f70f45d02ccf49964.tar.gz go-1090f0986dd9d7e1f3c31a7f70f45d02ccf49964.zip |
cmd/compile: rename mergeSymTyped to mergeSym
Also make canMergeSym take Syms instead of interface{}
Change-Id: I4926a1fc586aa90e198249d67e5b520404b40869
Reviewed-on: https://go-review.googlesource.com/c/go/+/265817
Trust: Alberto Donizetti <alb.donizetti@gmail.com>
Run-TryBot: Alberto Donizetti <alb.donizetti@gmail.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
Diffstat (limited to 'src/cmd/compile/internal/ssa/rewriteARM.go')
-rw-r--r-- | src/cmd/compile/internal/ssa/rewriteARM.go | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/src/cmd/compile/internal/ssa/rewriteARM.go b/src/cmd/compile/internal/ssa/rewriteARM.go index 6ade8283d6..47fd0a94cc 100644 --- a/src/cmd/compile/internal/ssa/rewriteARM.go +++ b/src/cmd/compile/internal/ssa/rewriteARM.go @@ -4529,7 +4529,7 @@ func rewriteValueARM_OpARMMOVBUload(v *Value) bool { } // match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVBUload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -4545,7 +4545,7 @@ func rewriteValueARM_OpARMMOVBUload(v *Value) bool { } v.reset(OpARMMOVBUload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -4747,7 +4747,7 @@ func rewriteValueARM_OpARMMOVBload(v *Value) bool { } // match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVBload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -4763,7 +4763,7 @@ func rewriteValueARM_OpARMMOVBload(v *Value) bool { } v.reset(OpARMMOVBload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -4959,7 +4959,7 @@ func rewriteValueARM_OpARMMOVBstore(v *Value) bool { } // match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVBstore [off1+off2] {mergeSymTyped(sym1,sym2)} ptr val mem) + // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -4976,7 +4976,7 @@ func rewriteValueARM_OpARMMOVBstore(v *Value) bool { } v.reset(OpARMMOVBstore) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg3(ptr, val, mem) return true } @@ -5148,7 +5148,7 @@ func rewriteValueARM_OpARMMOVDload(v *Value) bool { } // match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVDload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5164,7 +5164,7 @@ func rewriteValueARM_OpARMMOVDload(v *Value) bool { } v.reset(OpARMMOVDload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -5232,7 +5232,7 @@ func rewriteValueARM_OpARMMOVDstore(v *Value) bool { } // match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVDstore [off1+off2] {mergeSymTyped(sym1,sym2)} ptr val mem) + // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5249,7 +5249,7 @@ func rewriteValueARM_OpARMMOVDstore(v *Value) bool { } v.reset(OpARMMOVDstore) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg3(ptr, val, mem) return true } @@ -5294,7 +5294,7 @@ func rewriteValueARM_OpARMMOVFload(v *Value) bool { } // match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVFload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5310,7 +5310,7 @@ func rewriteValueARM_OpARMMOVFload(v *Value) bool { } v.reset(OpARMMOVFload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -5378,7 +5378,7 @@ func rewriteValueARM_OpARMMOVFstore(v *Value) bool { } // match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVFstore [off1+off2] {mergeSymTyped(sym1,sym2)} ptr val mem) + // result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5395,7 +5395,7 @@ func rewriteValueARM_OpARMMOVFstore(v *Value) bool { } v.reset(OpARMMOVFstore) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg3(ptr, val, mem) return true } @@ -5442,7 +5442,7 @@ func rewriteValueARM_OpARMMOVHUload(v *Value) bool { } // match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVHUload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5458,7 +5458,7 @@ func rewriteValueARM_OpARMMOVHUload(v *Value) bool { } v.reset(OpARMMOVHUload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -5682,7 +5682,7 @@ func rewriteValueARM_OpARMMOVHload(v *Value) bool { } // match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVHload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5698,7 +5698,7 @@ func rewriteValueARM_OpARMMOVHload(v *Value) bool { } v.reset(OpARMMOVHload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -5938,7 +5938,7 @@ func rewriteValueARM_OpARMMOVHstore(v *Value) bool { } // match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVHstore [off1+off2] {mergeSymTyped(sym1,sym2)} ptr val mem) + // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -5955,7 +5955,7 @@ func rewriteValueARM_OpARMMOVHstore(v *Value) bool { } v.reset(OpARMMOVHstore) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg3(ptr, val, mem) return true } @@ -6095,7 +6095,7 @@ func rewriteValueARM_OpARMMOVWload(v *Value) bool { } // match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVWload [off1+off2] {mergeSymTyped(sym1,sym2)} ptr mem) + // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -6111,7 +6111,7 @@ func rewriteValueARM_OpARMMOVWload(v *Value) bool { } v.reset(OpARMMOVWload) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg2(ptr, mem) return true } @@ -6570,7 +6570,7 @@ func rewriteValueARM_OpARMMOVWstore(v *Value) bool { } // match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) // cond: canMergeSym(sym1,sym2) - // result: (MOVWstore [off1+off2] {mergeSymTyped(sym1,sym2)} ptr val mem) + // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) sym1 := auxToSym(v.Aux) @@ -6587,7 +6587,7 @@ func rewriteValueARM_OpARMMOVWstore(v *Value) bool { } v.reset(OpARMMOVWstore) v.AuxInt = int32ToAuxInt(off1 + off2) - v.Aux = symToAux(mergeSymTyped(sym1, sym2)) + v.Aux = symToAux(mergeSym(sym1, sym2)) v.AddArg3(ptr, val, mem) return true } |