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| author | Cherry Zhang <cherryyz@google.com> | 2021-03-05 15:12:37 -0500 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2021-03-05 22:14:48 +0000 |
| commit | a829114b21b5a4238dea13dc97b030d650935ed8 (patch) | |
| tree | 27e2ef811e686a35160977a0e3abba7a9b8217f3 /src/cmd/compile/internal/ssa/rewriteAMD64.go | |
| parent | d85083911d6ea742901933a544467dad55bb381f (diff) | |
| download | go-a829114b21b5a4238dea13dc97b030d650935ed8.tar.gz go-a829114b21b5a4238dea13dc97b030d650935ed8.zip | |
cmd/compile: match Aux and AuxInt explicitly in store combining rule
CL 280456 introduced a new store combining rule. On the LHS some
of the Aux and AuxInt of the stores are not specified, therefore
ignored during the matching. The rule is only correct if they
match. This CL adds explict match.
TODO: maybe we want the rule matcher require Aux/AuxInt to be
always specified on the LHS (using _ to explicitly ignore)? Or
maybe we want it to match the zero value if not specified? The
current approach is error-prone.
Fixes #44823.
Change-Id: Ic12b4a0de63117f2f070039737f0c905f28561bc
Reviewed-on: https://go-review.googlesource.com/c/go/+/299289
Trust: Cherry Zhang <cherryyz@google.com>
Trust: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
Diffstat (limited to 'src/cmd/compile/internal/ssa/rewriteAMD64.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/rewriteAMD64.go | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go index 52d0fd095d..8da3b28b5c 100644 --- a/src/cmd/compile/internal/ssa/rewriteAMD64.go +++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go @@ -11415,20 +11415,21 @@ func rewriteValueAMD64_OpAMD64MOVBstore(v *Value) bool { v.AddArg3(p0, w0, mem) return true } - // match: (MOVBstore [7] p1 (SHRQconst [56] w) x1:(MOVWstore [5] p1 (SHRQconst [40] w) x2:(MOVLstore [1] p1 (SHRQconst [8] w) x3:(MOVBstore p1 w mem)))) + // match: (MOVBstore [7] {s} p1 (SHRQconst [56] w) x1:(MOVWstore [5] {s} p1 (SHRQconst [40] w) x2:(MOVLstore [1] {s} p1 (SHRQconst [8] w) x3:(MOVBstore [0] {s} p1 w mem)))) // cond: x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && clobber(x1, x2, x3) - // result: (MOVQstore p1 w mem) + // result: (MOVQstore {s} p1 w mem) for { if auxIntToInt32(v.AuxInt) != 7 { break } + s := auxToSym(v.Aux) p1 := v_0 if v_1.Op != OpAMD64SHRQconst || auxIntToInt8(v_1.AuxInt) != 56 { break } w := v_1.Args[0] x1 := v_2 - if x1.Op != OpAMD64MOVWstore || auxIntToInt32(x1.AuxInt) != 5 { + if x1.Op != OpAMD64MOVWstore || auxIntToInt32(x1.AuxInt) != 5 || auxToSym(x1.Aux) != s { break } _ = x1.Args[2] @@ -11440,7 +11441,7 @@ func rewriteValueAMD64_OpAMD64MOVBstore(v *Value) bool { break } x2 := x1.Args[2] - if x2.Op != OpAMD64MOVLstore || auxIntToInt32(x2.AuxInt) != 1 { + if x2.Op != OpAMD64MOVLstore || auxIntToInt32(x2.AuxInt) != 1 || auxToSym(x2.Aux) != s { break } _ = x2.Args[2] @@ -11452,7 +11453,7 @@ func rewriteValueAMD64_OpAMD64MOVBstore(v *Value) bool { break } x3 := x2.Args[2] - if x3.Op != OpAMD64MOVBstore { + if x3.Op != OpAMD64MOVBstore || auxIntToInt32(x3.AuxInt) != 0 || auxToSym(x3.Aux) != s { break } mem := x3.Args[2] @@ -11460,6 +11461,7 @@ func rewriteValueAMD64_OpAMD64MOVBstore(v *Value) bool { break } v.reset(OpAMD64MOVQstore) + v.Aux = symToAux(s) v.AddArg3(p1, w, mem) return true } |