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| author | Michael Pratt <mpratt@google.com> | 2020-10-09 12:41:50 -0400 |
|---|---|---|
| committer | Michael Pratt <mpratt@google.com> | 2020-10-23 14:18:13 +0000 |
| commit | 44dbeaf35600ae70f3e6296914ea31147d5f010c (patch) | |
| tree | 2e5d0ce9861972d1a89ecaf319c52a501e53c0d8 /src/cmd/compile/internal/ssa/opGen.go | |
| parent | ad61343f886cc5ce677e7bd62385144b2ba7b8f5 (diff) | |
| download | go-44dbeaf35600ae70f3e6296914ea31147d5f010c.tar.gz go-44dbeaf35600ae70f3e6296914ea31147d5f010c.zip | |
cmd/compile: intrinsify runtime/internal/atomic.{And,Or} on AMD64
These are identical to And8 and Or8, just using ANDL/ORL instead of
ANDB/ORB.
Change-Id: I99cf90a8b0b5f211fb23325dddd55821875f0c8f
Reviewed-on: https://go-review.googlesource.com/c/go/+/263140
Run-TryBot: Michael Pratt <mpratt@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
Trust: Michael Pratt <mpratt@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/compile/internal/ssa/opGen.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/opGen.go | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index e9c63cdddf..00efc8f38d 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -1034,7 +1034,9 @@ const ( OpAMD64CMPXCHGLlock OpAMD64CMPXCHGQlock OpAMD64ANDBlock + OpAMD64ANDLlock OpAMD64ORBlock + OpAMD64ORLlock OpARMADD OpARMADDconst @@ -2854,7 +2856,9 @@ const ( OpAtomicCompareAndSwap64 OpAtomicCompareAndSwapRel32 OpAtomicAnd8 + OpAtomicAnd32 OpAtomicOr8 + OpAtomicOr32 OpAtomicAdd32Variant OpAtomicAdd64Variant OpClobber @@ -13576,6 +13580,22 @@ var opcodeTable = [...]opInfo{ }, }, { + name: "ANDLlock", + auxType: auxSymOff, + argLen: 3, + clobberFlags: true, + faultOnNilArg0: true, + hasSideEffects: true, + symEffect: SymRdWr, + asm: x86.AANDL, + reg: regInfo{ + inputs: []inputInfo{ + {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 + {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB + }, + }, + }, + { name: "ORBlock", auxType: auxSymOff, argLen: 3, @@ -13591,6 +13611,22 @@ var opcodeTable = [...]opInfo{ }, }, }, + { + name: "ORLlock", + auxType: auxSymOff, + argLen: 3, + clobberFlags: true, + faultOnNilArg0: true, + hasSideEffects: true, + symEffect: SymRdWr, + asm: x86.AORL, + reg: regInfo{ + inputs: []inputInfo{ + {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 + {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB + }, + }, + }, { name: "ADD", @@ -35521,12 +35557,24 @@ var opcodeTable = [...]opInfo{ generic: true, }, { + name: "AtomicAnd32", + argLen: 3, + hasSideEffects: true, + generic: true, + }, + { name: "AtomicOr8", argLen: 3, hasSideEffects: true, generic: true, }, { + name: "AtomicOr32", + argLen: 3, + hasSideEffects: true, + generic: true, + }, + { name: "AtomicAdd32Variant", argLen: 3, hasSideEffects: true, |