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| author | Joel Sing <joel@sing.id.au> | 2020-02-26 03:58:59 +1100 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2020-02-26 17:59:57 +0000 |
| commit | c27dd0c9e581edb71c834e161db6a920ca239997 (patch) | |
| tree | 8aec1a1484bf4c31e853a7c2db9f5a3b80c4f8f9 /src/cmd/compile/internal/ssa/opGen.go | |
| parent | a1103dcc27b9c85800624367ebb89ef46d4307af (diff) | |
| download | go-c27dd0c9e581edb71c834e161db6a920ca239997.tar.gz go-c27dd0c9e581edb71c834e161db6a920ca239997.zip | |
cmd/compile: improve Eq32/Neq32 on riscv64
Use SUBW to perform a 32-bit subtraction, rather than zero extending from
32 to 64 bits. This reduces Eq32 and Neq32 to two instructions, rather than
the four instructions required previously.
Change-Id: Ib2798324881e9db842c864e91a0c1b1e48c4b67b
Reviewed-on: https://go-review.googlesource.com/c/go/+/220921
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/compile/internal/ssa/opGen.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/opGen.go | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index ff382eb673..a810d9fbc6 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -1885,6 +1885,7 @@ const ( OpRISCV64ADD OpRISCV64ADDI OpRISCV64SUB + OpRISCV64SUBW OpRISCV64MUL OpRISCV64MULW OpRISCV64MULH @@ -25029,6 +25030,20 @@ var opcodeTable = [...]opInfo{ }, }, { + name: "SUBW", + argLen: 2, + asm: riscv.ASUBW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 + {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 + }, + }, + }, + { name: "MUL", argLen: 2, commutative: true, |