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| author | Ruixin(Peter) Bao <ruixin.bao@ibm.com> | 2019-11-26 15:33:37 -0500 |
|---|---|---|
| committer | Michael Munday <mike.munday@ibm.com> | 2020-03-25 13:10:07 +0000 |
| commit | 16cfab8d89ec26a71356c73378ab92eafa6a7356 (patch) | |
| tree | 791a02e574a9eb3635161cf044a1408502412ce0 /src/cmd/compile/internal/ssa/opGen.go | |
| parent | 6b6414cab49fcc035e1f20bafdb723077e7d36bb (diff) | |
| download | go-16cfab8d89ec26a71356c73378ab92eafa6a7356.tar.gz go-16cfab8d89ec26a71356c73378ab92eafa6a7356.zip | |
cmd/compile: use load and test instructions on s390x
The load and test instructions compare the given value
against zero and will produce a condition code indicating
one of the following scenarios:
0: Result is zero
1: Result is less than zero
2: Result is greater than zero
3: Result is not a number (NaN)
The instruction can be used to simplify floating point comparisons
against zero, which can enable further optimizations.
This CL also reduces the size of .text section of math.test binary by around
0.7 KB (in hexadecimal, from 1358f0 to 135620).
Change-Id: I33cb714f0c6feebac7a1c46dfcc735e7daceff9c
Reviewed-on: https://go-review.googlesource.com/c/go/+/209159
Reviewed-by: Michael Munday <mike.munday@ibm.com>
Run-TryBot: Michael Munday <mike.munday@ibm.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/compile/internal/ssa/opGen.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/opGen.go | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index a6643cb1fc..e2b83e20b3 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -2094,6 +2094,8 @@ const ( OpS390XCMPWUconst OpS390XFCMPS OpS390XFCMP + OpS390XLTDBR + OpS390XLTEBR OpS390XSLD OpS390XSLW OpS390XSLDconst @@ -27999,6 +28001,26 @@ var opcodeTable = [...]opInfo{ }, }, { + name: "LTDBR", + argLen: 1, + asm: s390x.ALTDBR, + reg: regInfo{ + inputs: []inputInfo{ + {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 + }, + }, + }, + { + name: "LTEBR", + argLen: 1, + asm: s390x.ALTEBR, + reg: regInfo{ + inputs: []inputInfo{ + {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 + }, + }, + }, + { name: "SLD", argLen: 2, asm: s390x.ASLD, |