diff options
| author | Joel Sing <joel@sing.id.au> | 2020-03-10 03:31:22 +1100 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2020-03-25 01:40:51 +0000 |
| commit | 97585092f590072209110bce336f57506984c02b (patch) | |
| tree | dcbee94d9c0ccf9c13f67c38547b279401489108 /src/cmd/compile/internal/ssa/gen/RISCV64.rules | |
| parent | f4fe89108c42bde3978fda8b826acbcd77db6076 (diff) | |
| download | go-97585092f590072209110bce336f57506984c02b.tar.gz go-97585092f590072209110bce336f57506984c02b.zip | |
cmd/compile: fold constants into immediate instructions on riscv64
Where possible, fold constants into versions of instructions that take
an immediate. This avoids the need to allocate a register and load the
immediate into it.
Change-Id: If911ca41235e218490679aed2ce5f48bf807a2b3
Reviewed-on: https://go-review.googlesource.com/c/go/+/222639
Run-TryBot: Joel Sing <joel@sing.id.au>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
Diffstat (limited to 'src/cmd/compile/internal/ssa/gen/RISCV64.rules')
| -rw-r--r-- | src/cmd/compile/internal/ssa/gen/RISCV64.rules | 41 |
1 files changed, 37 insertions, 4 deletions
diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64.rules b/src/cmd/compile/internal/ssa/gen/RISCV64.rules index 4a7efd6e73..c107182b21 100644 --- a/src/cmd/compile/internal/ssa/gen/RISCV64.rules +++ b/src/cmd/compile/internal/ssa/gen/RISCV64.rules @@ -499,8 +499,41 @@ (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem) -> (MOVWstorezero [off] {sym} ptr mem) (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVDstorezero [off] {sym} ptr mem) -// Fold ADD+MOVDconst into ADDI where possible. -(ADD (MOVDconst [off]) ptr) && is32Bit(off) -> (ADDI [off] ptr) +// Fold constant into immediate instructions where possible. +(ADD (MOVBconst [val]) x) && is32Bit(val) -> (ADDI [val] x) +(ADD (MOVHconst [val]) x) && is32Bit(val) -> (ADDI [val] x) +(ADD (MOVWconst [val]) x) && is32Bit(val) -> (ADDI [val] x) +(ADD (MOVDconst [val]) x) && is32Bit(val) -> (ADDI [val] x) + +(AND (MOVBconst [val]) x) && is32Bit(val) -> (ANDI [val] x) +(AND (MOVHconst [val]) x) && is32Bit(val) -> (ANDI [val] x) +(AND (MOVWconst [val]) x) && is32Bit(val) -> (ANDI [val] x) +(AND (MOVDconst [val]) x) && is32Bit(val) -> (ANDI [val] x) + +(OR (MOVBconst [val]) x) && is32Bit(val) -> (ORI [val] x) +(OR (MOVHconst [val]) x) && is32Bit(val) -> (ORI [val] x) +(OR (MOVWconst [val]) x) && is32Bit(val) -> (ORI [val] x) +(OR (MOVDconst [val]) x) && is32Bit(val) -> (ORI [val] x) + +(XOR (MOVBconst [val]) x) && is32Bit(val) -> (XORI [val] x) +(XOR (MOVHconst [val]) x) && is32Bit(val) -> (XORI [val] x) +(XOR (MOVWconst [val]) x) && is32Bit(val) -> (XORI [val] x) +(XOR (MOVDconst [val]) x) && is32Bit(val) -> (XORI [val] x) + +(SLL x (MOVBconst [val])) -> (SLLI [val&63] x) +(SLL x (MOVHconst [val])) -> (SLLI [val&63] x) +(SLL x (MOVWconst [val])) -> (SLLI [val&63] x) +(SLL x (MOVDconst [val])) -> (SLLI [val&63] x) + +(SRL x (MOVBconst [val])) -> (SRLI [val&63] x) +(SRL x (MOVHconst [val])) -> (SRLI [val&63] x) +(SRL x (MOVWconst [val])) -> (SRLI [val&63] x) +(SRL x (MOVDconst [val])) -> (SRLI [val&63] x) + +(SRA x (MOVBconst [val])) -> (SRAI [val&63] x) +(SRA x (MOVHconst [val])) -> (SRAI [val&63] x) +(SRA x (MOVWconst [val])) -> (SRAI [val&63] x) +(SRA x (MOVDconst [val])) -> (SRAI [val&63] x) // Convert subtraction of a const into ADDI with negative immediate, where possible. (SUB x (MOVBconst [val])) && is32Bit(-val) -> (ADDI [-val] x) @@ -526,5 +559,5 @@ // Subtraction from zero with sign extension. (SUBW (MOVDconst [0]) x) -> (NEGW x) -// remove redundant *const ops -(ADDI [0] x) -> x +// Addition of zero. +(ADDI [0] x) -> x |