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| author | Cherry Zhang <cherryyz@google.com> | 2019-06-25 14:48:04 -0400 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2019-06-26 16:01:47 +0000 |
| commit | 4ea7aa7cf3755533634904d934c89f93d461d642 (patch) | |
| tree | c2bbd74b1f9f4d4e5b131b0afb881039b5818722 /src/cmd/compile/internal/ssa/gen/ARM64Ops.go | |
| parent | 24f7d89a73b7bd77127a56e8a8552c48278d251b (diff) | |
| download | go-4ea7aa7cf3755533634904d934c89f93d461d642.tar.gz go-4ea7aa7cf3755533634904d934c89f93d461d642.zip | |
cmd/compile, runtime: use R20, R21 in ARM64's Duff's devices
Currently we use R16 and R17 for ARM64's Duff's devices.
According to ARM64 ABI, R16 and R17 can be used by the (external)
linker as scratch registers in trampolines. So don't use these
registers to pass information across functions.
It seems unlikely that calling Duff's devices would need a
trampoline in normal cases. But it could happen if the call
target is out of the 128 MB direct jump limit.
The choice of R20 and R21 is kind of arbitrary. The register
allocator allocates from low-numbered registers. High numbered
registers are chosen so it is unlikely to hold a live value and
forces a spill.
Fixes #32773.
Change-Id: Id22d555b5afeadd4efcf62797d1580d641c39218
Reviewed-on: https://go-review.googlesource.com/c/go/+/183842
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Diffstat (limited to 'src/cmd/compile/internal/ssa/gen/ARM64Ops.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/gen/ARM64Ops.go | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cmd/compile/internal/ssa/gen/ARM64Ops.go b/src/cmd/compile/internal/ssa/gen/ARM64Ops.go index a0c8b060c7..d4de904a24 100644 --- a/src/cmd/compile/internal/ssa/gen/ARM64Ops.go +++ b/src/cmd/compile/internal/ssa/gen/ARM64Ops.go @@ -495,14 +495,14 @@ func init() { // arg1 = mem // auxint = offset into duffzero code to start executing // returns mem - // R16 aka arm64.REGRT1 changed as side effect + // R20 changed as side effect { name: "DUFFZERO", aux: "Int64", argLength: 2, reg: regInfo{ - inputs: []regMask{buildReg("R16")}, - clobbers: buildReg("R16 R30"), + inputs: []regMask{buildReg("R20")}, + clobbers: buildReg("R20 R30"), }, faultOnNilArg0: true, }, @@ -529,19 +529,19 @@ func init() { }, // duffcopy - // arg0 = address of dst memory (in R17 aka arm64.REGRT2, changed as side effect) - // arg1 = address of src memory (in R16 aka arm64.REGRT1, changed as side effect) + // arg0 = address of dst memory (in R21, changed as side effect) + // arg1 = address of src memory (in R20, changed as side effect) // arg2 = mem // auxint = offset into duffcopy code to start executing // returns mem - // R16, R17 changed as side effect + // R20, R21 changed as side effect { name: "DUFFCOPY", aux: "Int64", argLength: 3, reg: regInfo{ - inputs: []regMask{buildReg("R17"), buildReg("R16")}, - clobbers: buildReg("R16 R17 R26 R30"), + inputs: []regMask{buildReg("R21"), buildReg("R20")}, + clobbers: buildReg("R20 R21 R26 R30"), }, faultOnNilArg0: true, faultOnNilArg1: true, |