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| author | Cherry Zhang <cherryyz@google.com> | 2020-10-28 09:12:20 -0400 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2020-10-28 09:12:20 -0400 |
| commit | a16e30d162c1c7408db7821e7b9513cefa09c6ca (patch) | |
| tree | af752ba9ba44c547df39bb0af9bff79f610ba9d5 /src/cmd/compile/internal/ssa/gen/AMD64Ops.go | |
| parent | 91e4d2d57bc341dd82c98247117114c851380aef (diff) | |
| parent | cf6cfba4d5358404dd890f6025e573a4b2156543 (diff) | |
| download | go-a16e30d162c1c7408db7821e7b9513cefa09c6ca.tar.gz go-a16e30d162c1c7408db7821e7b9513cefa09c6ca.zip | |
[dev.link] all: merge branch 'master' into dev.linkdev.link
Clean merge.
Change-Id: Ia7b2808bc649790198d34c226a61d9e569084dc5
Diffstat (limited to 'src/cmd/compile/internal/ssa/gen/AMD64Ops.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/gen/AMD64Ops.go | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go index 2df5016d59..de5372670b 100644 --- a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go +++ b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go @@ -902,7 +902,9 @@ func init() { // Atomic memory updates. {name: "ANDBlock", argLength: 3, reg: gpstore, asm: "ANDB", aux: "SymOff", clobberFlags: true, faultOnNilArg0: true, hasSideEffects: true, symEffect: "RdWr"}, // *(arg0+auxint+aux) &= arg1 + {name: "ANDLlock", argLength: 3, reg: gpstore, asm: "ANDL", aux: "SymOff", clobberFlags: true, faultOnNilArg0: true, hasSideEffects: true, symEffect: "RdWr"}, // *(arg0+auxint+aux) &= arg1 {name: "ORBlock", argLength: 3, reg: gpstore, asm: "ORB", aux: "SymOff", clobberFlags: true, faultOnNilArg0: true, hasSideEffects: true, symEffect: "RdWr"}, // *(arg0+auxint+aux) |= arg1 + {name: "ORLlock", argLength: 3, reg: gpstore, asm: "ORL", aux: "SymOff", clobberFlags: true, faultOnNilArg0: true, hasSideEffects: true, symEffect: "RdWr"}, // *(arg0+auxint+aux) |= arg1 } var AMD64blocks = []blockData{ |