diff options
| author | Austin Clements <austin@google.com> | 2019-10-29 00:16:28 -0400 |
|---|---|---|
| committer | Austin Clements <austin@google.com> | 2019-10-29 13:48:29 +0000 |
| commit | ec10e6f364dddef88223eb9ddda1ee900b1551cb (patch) | |
| tree | fcb0ee857c9d8101e1890829f6c898655a2fc382 /src/cmd/compile/internal/mips | |
| parent | 28a15e3df34258f4f6c1de319fa30a81356ee92c (diff) | |
| download | go-ec10e6f364dddef88223eb9ddda1ee900b1551cb.tar.gz go-ec10e6f364dddef88223eb9ddda1ee900b1551cb.zip | |
cmd/compile: fix missing lowering of atomic {Load,Store}8
CL 203284 added a compiler intrinsics from atomic Load8 and Store8 on
several architectures, but missed the lowering on MIPS. This CL fixes
that.
Updates #10958, #24543.
Change-Id: I82e88971554fe8c33ad2bf195a633c44b9ac4cf7
Reviewed-on: https://go-review.googlesource.com/c/go/+/203977
Run-TryBot: Austin Clements <austin@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/compile/internal/mips')
| -rw-r--r-- | src/cmd/compile/internal/mips/ssa.go | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/src/cmd/compile/internal/mips/ssa.go b/src/cmd/compile/internal/mips/ssa.go index bac8574b5c..7efd8e105b 100644 --- a/src/cmd/compile/internal/mips/ssa.go +++ b/src/cmd/compile/internal/mips/ssa.go @@ -497,20 +497,36 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) { p.To.Name = obj.NAME_EXTERN p.To.Sym = gc.ExtendCheckFunc[v.AuxInt] s.UseArgs(12) // space used in callee args area by assembly stubs - case ssa.OpMIPSLoweredAtomicLoad: + case ssa.OpMIPSLoweredAtomicLoad8, + ssa.OpMIPSLoweredAtomicLoad32: s.Prog(mips.ASYNC) - p := s.Prog(mips.AMOVW) + var op obj.As + switch v.Op { + case ssa.OpMIPSLoweredAtomicLoad8: + op = mips.AMOVB + case ssa.OpMIPSLoweredAtomicLoad32: + op = mips.AMOVW + } + p := s.Prog(op) p.From.Type = obj.TYPE_MEM p.From.Reg = v.Args[0].Reg() p.To.Type = obj.TYPE_REG p.To.Reg = v.Reg0() s.Prog(mips.ASYNC) - case ssa.OpMIPSLoweredAtomicStore: + case ssa.OpMIPSLoweredAtomicStore8, + ssa.OpMIPSLoweredAtomicStore32: s.Prog(mips.ASYNC) - p := s.Prog(mips.AMOVW) + var op obj.As + switch v.Op { + case ssa.OpMIPSLoweredAtomicStore8: + op = mips.AMOVB + case ssa.OpMIPSLoweredAtomicStore32: + op = mips.AMOVW + } + p := s.Prog(op) p.From.Type = obj.TYPE_REG p.From.Reg = v.Args[1].Reg() p.To.Type = obj.TYPE_MEM |