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| author | Keith Randall <khr@golang.org> | 2020-04-11 22:15:58 -0700 |
|---|---|---|
| committer | Keith Randall <khr@golang.org> | 2020-04-30 17:19:57 +0000 |
| commit | 882ec701d2bc5df807637418d726f644ed2e0ef6 (patch) | |
| tree | 3cc6a88d461ea7a70b5e96dbf5c1b140f4cf3a19 /src/cmd/compile/internal/amd64 | |
| parent | 553e003414d3aa90cc39830ee22f08453d9f3408 (diff) | |
| download | go-882ec701d2bc5df807637418d726f644ed2e0ef6.tar.gz go-882ec701d2bc5df807637418d726f644ed2e0ef6.zip | |
cmd/compile: add indexed load+op operations to amd64
name old time/op new time/op delta
LoadAdd-16 545ns ± 0% 456ns ± 0% -16.31% (p=0.000 n=10+10)
Update #36468
Change-Id: I84f390d55490648fa1f58cdbc24fd74c4f1bc8c1
Reviewed-on: https://go-review.googlesource.com/c/go/+/227960
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
Diffstat (limited to 'src/cmd/compile/internal/amd64')
| -rw-r--r-- | src/cmd/compile/internal/amd64/ssa.go | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go index 2b75bd6549..e348e24a95 100644 --- a/src/cmd/compile/internal/amd64/ssa.go +++ b/src/cmd/compile/internal/amd64/ssa.go @@ -846,6 +846,28 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) { if v.Reg() != v.Args[0].Reg() { v.Fatalf("input[0] and output not in same register %s", v.LongString()) } + case ssa.OpAMD64ADDLloadidx1, ssa.OpAMD64ADDLloadidx4, ssa.OpAMD64ADDLloadidx8, ssa.OpAMD64ADDQloadidx1, ssa.OpAMD64ADDQloadidx8, + ssa.OpAMD64SUBLloadidx1, ssa.OpAMD64SUBLloadidx4, ssa.OpAMD64SUBLloadidx8, ssa.OpAMD64SUBQloadidx1, ssa.OpAMD64SUBQloadidx8, + ssa.OpAMD64ANDLloadidx1, ssa.OpAMD64ANDLloadidx4, ssa.OpAMD64ANDLloadidx8, ssa.OpAMD64ANDQloadidx1, ssa.OpAMD64ANDQloadidx8, + ssa.OpAMD64ORLloadidx1, ssa.OpAMD64ORLloadidx4, ssa.OpAMD64ORLloadidx8, ssa.OpAMD64ORQloadidx1, ssa.OpAMD64ORQloadidx8, + ssa.OpAMD64XORLloadidx1, ssa.OpAMD64XORLloadidx4, ssa.OpAMD64XORLloadidx8, ssa.OpAMD64XORQloadidx1, ssa.OpAMD64XORQloadidx8: + p := s.Prog(v.Op.Asm()) + + r, i := v.Args[1].Reg(), v.Args[2].Reg() + p.From.Type = obj.TYPE_MEM + p.From.Scale = v.Op.Scale() + if p.From.Scale == 1 && i == x86.REG_SP { + r, i = i, r + } + p.From.Reg = r + p.From.Index = i + + gc.AddAux(&p.From, v) + p.To.Type = obj.TYPE_REG + p.To.Reg = v.Reg() + if v.Reg() != v.Args[0].Reg() { + v.Fatalf("input[0] and output not in same register %s", v.LongString()) + } case ssa.OpAMD64DUFFZERO: off := duffStart(v.AuxInt) adj := duffAdj(v.AuxInt) |