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author | Meng Zhuo <mzh@golangcn.org> | 2021-03-16 18:51:41 +0800 |
---|---|---|
committer | Meng Zhuo <mzh@golangcn.org> | 2021-03-16 14:31:05 +0000 |
commit | e31e84010e0989e1df4bd2c55d529497119bb345 (patch) | |
tree | 59dc67c8c530fa09d3f71bf9c335ec057b28d340 /src/cmd/asm | |
parent | bd0fc0b9c32e3697380a6484154accacdb928f97 (diff) | |
download | go-e31e84010e0989e1df4bd2c55d529497119bb345.tar.gz go-e31e84010e0989e1df4bd2c55d529497119bb345.zip |
cmd/asm: add rotr/drotr for mips64
This CL encodes:
ROTR rd, rt, sa
ROTRV rd, rt, rs
=> ROTR (SCON|REG), (REG,)? REG
DROTR rd, rt, sa
DROTR32 rd, rt, sa
DROTRV rd, rt, rs
=> ROTRV (SCON|REG), (REG,)? REG
Note: ROTRV will handle const over 32
Ref: The MIPS64® Instruction Set Reference Manual Revision 6.05
Change-Id: Ibe69f999b83eb43843d088cf1ac5a13c995269a5
Reviewed-on: https://go-review.googlesource.com/c/go/+/280114
Trust: Meng Zhuo <mzh@golangcn.org>
Run-TryBot: Meng Zhuo <mzh@golangcn.org>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm')
-rw-r--r-- | src/cmd/asm/internal/asm/testdata/mips64.s | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/mips64.s b/src/cmd/asm/internal/asm/testdata/mips64.s index 21ab82f319..99044d89f7 100644 --- a/src/cmd/asm/internal/asm/testdata/mips64.s +++ b/src/cmd/asm/internal/asm/testdata/mips64.s @@ -407,6 +407,8 @@ label4: SRLV R27, R6, R17 // 03668816 SRA R11, R19, R20 // 0173a007 SRAV R20, R19, R19 // 02939817 + ROTR R19, R18, R20 // 0272a046 + ROTRV R9, R13, R16 // 012d8056 // LSHW rreg ',' rreg // { @@ -418,6 +420,8 @@ label4: SRLV R27, R6 // 03663016 SRA R11, R19 // 01739807 SRAV R20, R19 // 02939817 + ROTR R20, R19 // 02939846 + ROTRV R16, R9 // 02094856 // LSHW imm ',' sreg ',' rreg // { @@ -429,6 +433,8 @@ label4: SRLV $31, R6, R17 // 00068ffa SRA $8, R8, R19 // 00089a03 SRAV $19, R8, R7 // 00083cfb + ROTR $12, R8, R3 // 00281b02 + ROTRV $8, R22, R22 // 0036b23a // LSHW imm ',' rreg // { @@ -440,6 +446,8 @@ label4: SRLV $31, R17 // 00118ffa SRA $3, R12 // 000c60c3 SRAV $12, R3 // 00031b3b + ROTR $12, R8 // 00284302 + ROTRV $63, R22 // 0036b7fe // LAND/LXOR/LNOR/LOR rreg ',' rreg |