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authorVladimir Stefanovic <vladimir.stefanovic@imgtec.com>2016-12-20 18:24:40 +0100
committerRob Pike <r@golang.org>2016-12-20 20:58:12 +0000
commit6e87f8896106c9a673c3c049c83ef389178cef82 (patch)
treeea5cf16e0e63500757e9fc47d4c6d239fbc8457a /doc/asm.html
parent2eae691d56125c62e0e5f0e4a3bd42e67e423f01 (diff)
downloadgo-6e87f8896106c9a673c3c049c83ef389178cef82.tar.gz
go-6e87f8896106c9a673c3c049c83ef389178cef82.zip
doc: add mips, mips64 information to asm.html
Fixes #18105 Change-Id: Id56e8782ff618761ec44b6dc20891c8b48fea8df Reviewed-on: https://go-review.googlesource.com/34632 Reviewed-by: Rob Pike <r@golang.org>
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@@ -838,6 +838,44 @@ It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
</ul>
+<h3 id="mips">MIPS, MIPS64</h3>
+
+<p>
+General purpose registers are named <code>R0</code> through <code>R31</code>,
+floating point registers are <code>F0</code> through <code>F31</code>.
+</p>
+
+<p>
+<code>R30</code> is reserved to point to <code>g</code>.
+<code>R23</code> is used as a temporary register.
+</p>
+
+<p>
+In a <code>TEXT</code> directive, the frame size <code>$-4</code> for MIPS or
+<code>$-8</code> for MIPS64 instructs the linker not to save <code>LR</code>.
+</p>
+
+<p>
+<code>SP</code> refers to the virtual stack pointer.
+For the hardware register, use <code>R29</code>.
+</p>
+
+<p>
+Addressing modes:
+</p>
+
+<ul>
+
+<li>
+<code>16(R1)</code>: The location at <code>R1</code> plus 16.
+</li>
+
+<li>
+<code>(R1)</code>: Alias for <code>0(R1)</code>.
+</li>
+
+</ul>
+
<h3 id="unsupported_opcodes">Unsupported opcodes</h3>
<p>