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| author | eric fang <eric.fang@arm.com> | 2023-06-13 10:02:33 +0000 |
|---|---|---|
| committer | Eric Fang <eric.fang@arm.com> | 2023-06-15 01:59:49 +0000 |
| commit | 9fc84363d1c317fd8d8f963de3bb10f8a8df05ac (patch) | |
| tree | 57a11bc4bb834efce18057a7d81c173a5d68e9b9 | |
| parent | da94586aa3767c38ccb625ac653e038bb842444a (diff) | |
| download | go-9fc84363d1c317fd8d8f963de3bb10f8a8df05ac.tar.gz go-9fc84363d1c317fd8d8f963de3bb10f8a8df05ac.zip | |
cmd/asm: fix encoding errors for FMOVD and FMOVS instructions on arm64
The encoding of instructions "FMOVD F1, ZR" and "FMOVS F1, ZR" is wrong,
the assembler encodes them as "FMOVD F1, F31" and "FMOVS F1, F31". This
CL fixes the bug.
Change-Id: I2d31520b58f9950ce2534a04f4a3275bf103a673
Reviewed-on: https://go-review.googlesource.com/c/go/+/503135
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
Run-TryBot: Eric Fang <eric.fang@arm.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64.s | 2 | ||||
| -rw-r--r-- | src/cmd/internal/obj/arm64/asm7.go | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64.s b/src/cmd/asm/internal/asm/testdata/arm64.s index 534a0b3e41..11bd678552 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64.s +++ b/src/cmd/asm/internal/asm/testdata/arm64.s @@ -238,6 +238,8 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8 FMOVS $0, F0 // e003271e FMOVD ZR, F0 // e003679e FMOVS ZR, F0 // e003271e + FMOVD F1, ZR // 3f00669e + FMOVS F1, ZR // 3f00261e VUADDW V9.B8, V12.H8, V14.H8 // 8e11292e VUADDW V13.H4, V10.S4, V11.S4 // 4b116d2e VUADDW V21.S2, V24.D2, V29.D2 // 1d13b52e diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go index 77c60812ac..ff8daad857 100644 --- a/src/cmd/internal/obj/arm64/asm7.go +++ b/src/cmd/internal/obj/arm64/asm7.go @@ -3880,7 +3880,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) { case 29: /* op Rn, Rd */ fc := c.aclass(&p.From) tc := c.aclass(&p.To) - if (p.As == AFMOVD || p.As == AFMOVS) && (fc == C_REG || fc == C_ZREG || tc == C_REG) { + if (p.As == AFMOVD || p.As == AFMOVS) && (fc == C_REG || fc == C_ZREG || tc == C_REG || tc == C_ZREG) { // FMOV Rx, Fy or FMOV Fy, Rx o1 = FPCVTI(0, 0, 0, 0, 6) if p.As == AFMOVD { |