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author | Cherry Zhang <cherryyz@google.com> | 2017-03-05 11:37:09 -0500 |
---|---|---|
committer | Austin Clements <austin@google.com> | 2017-04-05 16:58:22 +0000 |
commit | dc70a5efd14c0665bbf37401cc715a1ad349086e (patch) | |
tree | 36ab57b374944a270935d304f458e2afb7f7f407 | |
parent | 77476e81d9b3427e825107a582aacfe65b3ae718 (diff) | |
download | go-dc70a5efd14c0665bbf37401cc715a1ad349086e.tar.gz go-dc70a5efd14c0665bbf37401cc715a1ad349086e.zip |
[release-branch.go1.8] cmd/compile: mark MOVWF/MOVFW clobbering F15 on ARM
The assembler back end uses F15 as a temporary register in these
instructions.
Checked the assembler back end and made sure that this is the
only case clobbering F15.
Fixes #19403.
Change-Id: I02b9e00fdd9229db899f501c8e9b306e02912d83
Reviewed-on: https://go-review.googlesource.com/39598
Run-TryBot: Austin Clements <austin@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
-rw-r--r-- | src/cmd/compile/internal/ssa/gen/ARMOps.go | 4 | ||||
-rw-r--r-- | src/cmd/compile/internal/ssa/opGen.go | 8 |
2 files changed, 10 insertions, 2 deletions
diff --git a/src/cmd/compile/internal/ssa/gen/ARMOps.go b/src/cmd/compile/internal/ssa/gen/ARMOps.go index e296d0600d..6d9a90acb2 100644 --- a/src/cmd/compile/internal/ssa/gen/ARMOps.go +++ b/src/cmd/compile/internal/ssa/gen/ARMOps.go @@ -119,8 +119,8 @@ func init() { fp01 = regInfo{inputs: nil, outputs: []regMask{fp}} fp11 = regInfo{inputs: []regMask{fp}, outputs: []regMask{fp}} fp1flags = regInfo{inputs: []regMask{fp}} - fpgp = regInfo{inputs: []regMask{fp}, outputs: []regMask{gp}} - gpfp = regInfo{inputs: []regMask{gp}, outputs: []regMask{fp}} + fpgp = regInfo{inputs: []regMask{fp}, outputs: []regMask{gp}, clobbers: buildReg("F15")} // int-float conversion uses F15 as tmp + gpfp = regInfo{inputs: []regMask{gp}, outputs: []regMask{fp}, clobbers: buildReg("F15")} fp21 = regInfo{inputs: []regMask{fp, fp}, outputs: []regMask{fp}} fp2flags = regInfo{inputs: []regMask{fp, fp}} fpload = regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{fp}} diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index 941e6466ae..2938bd1706 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -10083,6 +10083,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, @@ -10096,6 +10097,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, @@ -10109,6 +10111,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, @@ -10122,6 +10125,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, @@ -10135,6 +10139,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, @@ -10148,6 +10153,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, @@ -10161,6 +10167,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, @@ -10174,6 +10181,7 @@ var opcodeTable = [...]opInfo{ inputs: []inputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, + clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, |