diff options
author | Vladimir Stefanovic <vladimir.stefanovic@imgtec.com> | 2017-03-21 14:57:58 +0100 |
---|---|---|
committer | Austin Clements <austin@google.com> | 2017-04-05 16:58:19 +0000 |
commit | 77476e81d9b3427e825107a582aacfe65b3ae718 (patch) | |
tree | eed7df84418f0049115959b2646cadd7f04255c6 | |
parent | bf71119d54f7f2c64908af7c1af46ed2cbce0967 (diff) | |
download | go-77476e81d9b3427e825107a582aacfe65b3ae718.tar.gz go-77476e81d9b3427e825107a582aacfe65b3ae718.zip |
[release-branch.go1.8] cmd/compile,runtime: fix atomic And8 for mipsle
Removing stray xori that came from big endian copy/paste.
Adding atomicand8 check to runtime.check() that would have revealed
this error.
Might fix #19396.
Change-Id: If8d6f25d3e205496163541eb112548aa66df9c2a
Reviewed-on: https://go-review.googlesource.com/39597
Run-TryBot: Austin Clements <austin@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
-rw-r--r-- | src/cmd/compile/internal/ssa/gen/MIPS.rules | 3 | ||||
-rw-r--r-- | src/cmd/compile/internal/ssa/rewriteMIPS.go | 7 | ||||
-rw-r--r-- | src/runtime/runtime1.go | 6 |
3 files changed, 9 insertions, 7 deletions
diff --git a/src/cmd/compile/internal/ssa/gen/MIPS.rules b/src/cmd/compile/internal/ssa/gen/MIPS.rules index 008f1b1df1..ad7a954973 100644 --- a/src/cmd/compile/internal/ssa/gen/MIPS.rules +++ b/src/cmd/compile/internal/ssa/gen/MIPS.rules @@ -404,8 +404,7 @@ (ANDconst <config.fe.TypeUInt32()> [3] ptr))) (NORconst [0] <config.fe.TypeUInt32()> (SLL <config.fe.TypeUInt32()> (MOVWconst [0xff]) (SLLconst <config.fe.TypeUInt32()> [3] - (ANDconst <config.fe.TypeUInt32()> [3] - (XORconst <config.fe.TypeUInt32()> [3] ptr)))))) mem) + (ANDconst <config.fe.TypeUInt32()> [3] ptr))))) mem) // AtomicOr8(ptr,val) -> LoweredAtomicOr(ptr&^3,uint32(val) << (((ptr^3) & 3) * 8)) (AtomicOr8 ptr val mem) && config.BigEndian -> diff --git a/src/cmd/compile/internal/ssa/rewriteMIPS.go b/src/cmd/compile/internal/ssa/rewriteMIPS.go index cbe9f1b580..76eac5b1cf 100644 --- a/src/cmd/compile/internal/ssa/rewriteMIPS.go +++ b/src/cmd/compile/internal/ssa/rewriteMIPS.go @@ -712,7 +712,7 @@ func rewriteValueMIPS_OpAtomicAnd8(v *Value, config *Config) bool { _ = b // match: (AtomicAnd8 ptr val mem) // cond: !config.BigEndian - // result: (LoweredAtomicAnd (AND <config.fe.TypeUInt32().PtrTo()> (MOVWconst [^3]) ptr) (OR <config.fe.TypeUInt32()> (SLL <config.fe.TypeUInt32()> (ZeroExt8to32 val) (SLLconst <config.fe.TypeUInt32()> [3] (ANDconst <config.fe.TypeUInt32()> [3] ptr))) (NORconst [0] <config.fe.TypeUInt32()> (SLL <config.fe.TypeUInt32()> (MOVWconst [0xff]) (SLLconst <config.fe.TypeUInt32()> [3] (ANDconst <config.fe.TypeUInt32()> [3] (XORconst <config.fe.TypeUInt32()> [3] ptr)))))) mem) + // result: (LoweredAtomicAnd (AND <config.fe.TypeUInt32().PtrTo()> (MOVWconst [^3]) ptr) (OR <config.fe.TypeUInt32()> (SLL <config.fe.TypeUInt32()> (ZeroExt8to32 val) (SLLconst <config.fe.TypeUInt32()> [3] (ANDconst <config.fe.TypeUInt32()> [3] ptr))) (NORconst [0] <config.fe.TypeUInt32()> (SLL <config.fe.TypeUInt32()> (MOVWconst [0xff]) (SLLconst <config.fe.TypeUInt32()> [3] (ANDconst <config.fe.TypeUInt32()> [3] ptr))))) mem) for { ptr := v.Args[0] val := v.Args[1] @@ -750,10 +750,7 @@ func rewriteValueMIPS_OpAtomicAnd8(v *Value, config *Config) bool { v10.AuxInt = 3 v11 := b.NewValue0(v.Line, OpMIPSANDconst, config.fe.TypeUInt32()) v11.AuxInt = 3 - v12 := b.NewValue0(v.Line, OpMIPSXORconst, config.fe.TypeUInt32()) - v12.AuxInt = 3 - v12.AddArg(ptr) - v11.AddArg(v12) + v11.AddArg(ptr) v10.AddArg(v11) v8.AddArg(v10) v7.AddArg(v8) diff --git a/src/runtime/runtime1.go b/src/runtime/runtime1.go index 40c0e8579c..5d0bf814b8 100644 --- a/src/runtime/runtime1.go +++ b/src/runtime/runtime1.go @@ -260,6 +260,12 @@ func check() { throw("atomicor8") } + m = [4]byte{0xff, 0xff, 0xff, 0xff} + atomic.And8(&m[1], 0x1) + if m[0] != 0xff || m[1] != 0x1 || m[2] != 0xff || m[3] != 0xff { + throw("atomicand8") + } + *(*uint64)(unsafe.Pointer(&j)) = ^uint64(0) if j == j { throw("float64nan") |